git.monstr.eu Git - linux-2.6-microblaze.git/log

arm64: dts: renesas: r9a07g044: Add ADC node

Add ADC node to R9A07G044 (RZ/G2L) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210804202118.25745-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r9a07g044: Add pinctrl node

Add GPIO/pinctrl node to R9A07G044 (RZ/G2L) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210727112328.18809-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: meson: add audio playback to vega-s95 dtsi

Add initial support limited to HDMI i2s and SPDIF (LPCM).

Tested-by: Oleg Ivanov <150balbes@yandex.ru>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140258.4666-1-christianshewitt@gmail.com

arm64: dts: meson: add audio playback to nexbox-a1

Add initial support limited to HDMI i2s and SPDIF (LPCM).

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140029.4445-1-christianshewitt@gmail.com

ARM: dts: am335x-sancloud-bbe: Drop usb wifi comment

The wifi chip on USB port 4 may not be present on all BBE variants.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refs

pinctrl settings for the USB hub, barometer & accelerometer need to be
referenced from the relevant nodes to work.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7

The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by
ARM).

Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Reported-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Fixes: b9024cbc937d ("arm64: dts: Add initial device tree support for exynos7")
Link: https://lore.kernel.org/r/20210805072110.4730-1-krzysztof.kozlowski@canonical.com

ARM: dts: imx7: add ftm nodes for Flex Timers

The i.MX7 has two possible Flex Timers, disabled by default. Moreover, the
block is the same as LS1021a, then the drivers can be used as-is.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board

Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board

Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2

The DH electronics PDK2 can be populated with SoM with i.MX6S/DL/D/Q
variants. Split the SoC-independent parts of the SoM and PDK2 into the
imx6qdl-dhcom-*.dtsi and reduce imx6q-dhcom-pdk2.dts to example of
adding i.MX6S/DL/D/Q variants of the SoM into a PDK2 carrier board.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6q-dhcom: Cleanup of the devicetrees

Following cleanups of the devicetrees done, no change in function:
- Remove parentheses from the license
- Update copyright date
- Alphabetical sorting
- Add comments
- Update pinctrl names
- Hex values in lower case
- Set 3rd values of fixed regulators gpio property to 0
- Replace interrupt type with a define
- Remove superfluous property max-speed from the fec node

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6q-dhcom: Rearrange of iomux

Move iomux to the end, no change in function.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls

The function of each SoM pins is defined in the DHCOM standard [1] and
subset of them is defined as GPIOs (pins A-W). To ensure the interchange-
ability of the DHCOM SoMs, the function of the pins are fixed and cannot
be changed. On board level the DHCOM GPIOs can be used associated with
different blocks e.g. for interrupt or reset, but the function is always
GPIO. If not used, they can be freely used in the user space.

Therefore the whole configuration of SoM pins is made in the SoM DT.
Defining the DHCOM GPIO pins as a separate pinctrl nodes makes moving a
subset of them to an appropriate block pinctrl group easier on board level,
since it is not necessary to have a large pinctrl hog group containing
unrelated pinmux entries on board level. This also makes it easy to update
the SoM DT without having to update all the board DTs too. If necessary it
is also possible to change the electrical properties of the DHCOM GPIOs by
overwriting the pinctrl on board level.

[1] https://wiki.dh-electronics.com/images/2/2e/DOC_DHCOM-Standard-Specification_R01_2016-11-17.pdf

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board

The PDK2 board is capable of running both 100M and 1G ethernet. However,
the i.MX6 has only one ethernet MAC, so it is possible to configure
either 100M or 1G Ethernet. In case of 100M option, the PHY is on the
SoM and the signals are routed to a RJ45 port. For 1G the PHY is on
the PDK2 board with another RJ45 port. 100M and 1G ethernet use
different signal pins from the i.MX6, but share the MDIO bus.

This SoM board combination is used to demonstrate how to enable 1G
ethernet configuration.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3

This adds a devicetree for the Freecom FSG-3, a combined router
and NAS.

Cc: Rod Whitby <rod@whitby.id.au>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add devicetree for Linksys WRV54G

This adds a device tree for the Linksys WRV54G also known as
Gemtek GTWX5715. Some enhancements have been folded in from the
OpenWrt patches.

This supports everything in the upstream kernel with placeholders
for the out-of-tree multiphy which exist in OpenWrt.

Cc: phj@phj.hu
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add device trees for Coyote and IXDPG425

This adds device trees for the ADI Engineering Coyote and the
Intel IXDPG425 reference design. The ethernet set-up on the
IXDPG425 is a bit dubious because I think it uses a DSA
switch chip, but this is a good as it gets right now.

The Coyote boardfile claims an IDE port exist at 0xFFFE1000
but the implementation does not use this. If you have the
board and can/want to test, please contact me.

Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add Intel IXDP425 etc reference designs

The IXDP425, IXCDP1100, KIXRP435 and IXDP465 are similar Intel reference
designs for IXP42x, IXP43x and IXP4[56]x.

This adds device trees for these so the board files can be migrated.

Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add CF to GW2358

This adds support for the compact flash card slot on the
Gateworks GW2358 router.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add Gateworks Avila GW2348 device tree

This adds a device tree file for the Gateworks Avila GW2348 platform
supporting all the features of the in-kernel boardfiles.

There are more boards in the Avila family, but this is the one that
is supported out-of-the-box by the current boardfiles. Some extra
features have been folded in from the upstream OpenWrt sources,
such as proper ethernet setup for both ethernet ports.

More variants can be added based on this device tree. Some of those
have DSA switches, multiple LEDs, multiple serial ports and similar
and would need some more elaborate work.

Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Tom Billman <kernel@giantshoulderinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add Arcom Vulcan device tree

This adds a device tree for the Arcom Vulcan IXP42x board.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add devicetree for Netgear WG302v2

This adds a devicetree for the Netgear WG302v2 router.

The DTS is mostly based on the upstream boardfile but I also
added in the ethernet from OpenWrt to get a more complete
system.

Cc: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Use the expansion bus

Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.

Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.

Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add second UART

The IXP4xx has two UARTs and some platforms make use of the
second one so add this to the include DTSI.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev A

This adds a devicetree for the D-Link DSM-G600 Wireless Network
Storage Enclosure so that we can delete the boardfile. The boardfile
does not even define an ethernet interface as it has an external
ethernet on PCI. This devicetree is for revision A using IXP420
the rev B version uses PowerPC.

Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Michael Westerhof <mwester@dls.net>
Cc: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Move EPBX100 flash to external bus node

This moves the EPBX100 flash under the external bus on CS0
like on the other IXP4xx systems.

Cc: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Add devicetree for Iomega NAS 100D

This creates a more or less fully featured device tree for the
IXP42x-based Iomega NAS 100D.

We can't read out the raw flash contents for ethernet MAC, and
we cannot handle a power-off-button inside the kernel like the
boardfile does. These two things are normally done in userspace.

This conversion is part of moving all of the IXP4xx board files
over to device tree to modernize the IXP4xx kernel.

Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ixp4xx: Fix up bad interrupt flags

The PCI hosts had bad IRQ semantics, these are all active low.
Use the proper define and fix all in-tree users.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: dts: ebaz4205: enable NAND support

The board features a 128MiB NAND chip and recently linux gained support
for the NAND controller on the Zynq SoC. Thus add the corresponding
devicetree nodes.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-4-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: dts: zynq: add NAND flash controller node

Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2260

Remove clk_ignore_unused from bootargs as it's no more needed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: remove clk_ignore_unused from bootargs for stih418-b2199

Remove clk_ignore_unused from bootargs as it's no more needed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2120

Remove clk_ignore_unused from bootargs as it's no more needed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: remove clk_ignore_unused from bootargs for stih407-b2120

Remove clk_ignore_unused from bootargs as it's no more needed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board

4KOpen (B2264) is a board based on the STMicroelectronics STiH418 soc:
  - 2GB DDR
  - HDMI
  - Ethernet 1000-BaseT
  - PCIe (mini PCIe connector)
  - MicroSD slot
  - USB2 and USB3 connectors
  - Sata
  - 40 pins GPIO header

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: add the thermal sensor node within stih418

The STiH418 embedded the same sensor as the STiH410.
This commit adds the corresponding node, relying on the st_thermal
driver.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: disable rng11 on the stih418 platform

The rng11 is not available on the STiH418 hence is disabled in the
stih418.dtsi

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: add the spinor controller node within stih407-family

The STiH407 family (and further versions STiH410/STiH418) embedded
a serial flash controller allowing fast access to SPI-NOR.
This commit adds the corresponding node, relying on the st-spi-fsm
drivers.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-fsyn entries in stih418-clock

The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-fsyn entries in stih410-clock

The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-fsyn entries in stih407-clock

The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-pll entries in stih418-clock

The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-pll entries in stih410-clock

The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update clkgen-pll entries in stih407-clock

The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update flexgen compatible within stih410-clock

With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update flexgen compatible within stih407-clock

With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: sti: update flexgen compatible within stih418-clock

With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

ARM: dts: am335x-bone: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, Switch BeagleBone boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT
nodes which already defined in am335x-bone-common.dtsi.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am33xx: update ethernet aliases

Update ethernet aliases to point at CPSW switchdev driver.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-sl50: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Toby Churchill SL50 Series to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-shc: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Bosch SHC to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-phycore: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR,
PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port
wired and configured in dual_mac mode by default, or only 1 Ext. port.

Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-pepper: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Gumstix Pepper to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-pdu001: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or
2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-myirtech: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch MYIR MYC-AM335X/MYD-AM335X to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-moxa-uc: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Moxa am335x-moxa-uc-210x/8100 to use new cpsw switch driver.
Those boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Cc: Johnson Chen <johnsonch.chen@moxa.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-lxm: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch NovaTech OrionLXm to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-igep0033: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch am335x-igep0033 to use new cpsw switch driver. Those boards have
or 2 Ext. port wired and configured in dual_mac mode by default, or only 1
Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-cm-t335: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch CompuLab CM-T335 to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-chiliboard: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch AM335x Chiliboard to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-nano: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch Newflow AM335x NanoBone to use new cpsw switch driver. Those
boards have or 2 Ext. port wired and configured in dual_mac mode by
default, or only 1 Ext. port.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: dts: am335x-baltos: switch to new cpsw switch drv

The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.

So, switch OnRISC Baltos and NetCom/Cam boards to use new cpsw switch
driver. Those boards have or 2 Ext. port wired and configured in dual_mac
mode by default, or only 1 Ext. port.

Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

dt-bindings: mediatek: Add optional mediatek,gce-events property

This property is used by gce clients.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210622030741.2120393-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

arm64: dts: mt8183: add mediatek,gce-events in mutex

mediatek,gce-events is read by mutex node.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210622030741.2120393-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

arm64: dts: mediatek: mt8173: Add domain supply for mfg_async

da9211 regulator needs to be enabled before enabling the mfg_async power
domain. Otherwise the subdomain is not enabled and causes failure in
imgtec gpu driver boot.

Add the "domain-supply" property to the "mfg_async" node in DT.

Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210701114012.RESEND.3.I9e27871bb700c807a564957302b292e9935dae0b@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

arm64: dts: mt8173: elm: Use aliases to mmc nodes

With commit 1796164fac7e ("dt-bindings: mmc: document alias support"),
a way to specify fixed index numbers was provided. This patch use aliases
to mmc nodes so the partition name for eMMC and SD card will be consistent
across boots.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210728040710.2891955-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

arm64: dts: mt8183: kukui: Use aliases to mmc nodes

With commit 1796164fac7e ("dt-bindings: mmc: document alias support"),
a way to specify fixed index numbers was provided. This patch use aliases
to mmc nodes so the partition name for eMMC and SD card will be consistent
across boots.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210728040710.2891955-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

arm64: dts: qcom: sm8250: assign DSI clock source parents

Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210709210729.953114-6-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sdm845-mtp: assign DSI clock source parents

Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210709210729.953114-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sdm845: assign DSI clock source parents

Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210709210729.953114-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7180: assign DSI clock source parents

Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210709210729.953114-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280-idp: Add device tree files for IDP2

Move all the common device tree bits for both sc7280 IDPs into a
sc7280-idp.dtsi and create 2 different dts files (sc7280-idp.dts
and sc7280-idp2.dts) in order to manage differences across the
IDP SKU1 and SKU2 Boards.
PMR735A is present on IDP board only and is not present on IDP2.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/1628082199-17002-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

dt-bindings: arm: qcom: Document qcom,sc7280-idp2 board

Document the qcom,sc7280-idp2 board based off sc7280 SoC,
The board is also known as piglin in the Chrome OS builds,
so document the google,piglin compatible as well.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1628082199-17002-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sm8350: fix IPA interconnects

There should only be two interconnects defined for IPA on the
QUalcomm SM8350 SoC. The names should also match those specified by
the IPA Device Tree binding.

Fixes: f11d3e7da32e ("arm64: dts: qcom: sm8350: add IPA information")
Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210804210214.1891755-5-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7180: define ipa_fw_mem node

Define the reserved memory space used for IPA firmware for the
Qualcomm SC7180 SoC.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210804210214.1891755-4-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: enable IPA for sc7280-idp

Enable IPA for the SC7280 IDP, with the modem performing early
initialization.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210804210214.1891755-3-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: add IPA information

Add IPA-related nodes and definitions to "sc7280.dtsi", including
the reserved memory area used for AP-based IPA firmware loading.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210804210214.1891755-2-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7180-trogdor: Move panel under the bridge chip

Putting the panel under the bridge chip (under the aux-bus node)
allows the panel driver to get access to the DP AUX bus, enabling all
sorts of fabulous new features.

While we're at this, get rid of a level of hierarchy for the panel
node. It doesn't need "ports / port" and can just have a "port" child.

For Linux, this patch has a hard requirement on the patches adding DP
AUX bus support to the ti-sn65dsi86 bridge chip driver. See the patch
("drm/bridge: ti-sn65dsi86: Add support for the DP AUX bus").

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210611101711.v10.11.Ibdb7735fb1844561b902252215a69526a14f9abd@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: ipq8074: add PRNG node

PRNG insinde of IPQ8074 is already supported,
so simply add the node for it.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20210518181618.3238386-2-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: ipq8074: add crypto nodes

IPQ8074 uses Qualcom QCE crypto engine v5.1
which is already supported.

So simply add nodes for its DMA and QCE itself.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20210518181618.3238386-1-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sm8350: add qupv3_id_1/i2c13 nodes

Add the qupv3_id_1 node and the i2c13 child node used for i2c devices
connected to gpio0/gpio1.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20210513181309.12491-2-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: ipq6018: Add pcie support

ipq6018 has 1 pcie gen3 port. This patch adds the support for the same.

The GICv2m reg property value is a guess based on similar SoCs
description in downstream Codeaurora kernel. It appears to work.

Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
[baruch: adjust #address-cells/#size-cells; drop unsupported property;
increase parf registers size]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/0f733656666fa6adaa8e196419ebcfd04677d173.1620203062.git.baruch@tkos.co.il
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: pm8150b: Add DTS node for PMIC VBUS booster

Add the required DTS node for the USB VBUS output regulator, which is
available on PM8150B. This will provide the VBUS source to connected
peripherals.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20210427130712.2005456-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sm8150: add SPI nodes

Add missing SPI nodes for SM8150.

Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210416103225.1872145-1-balbi@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: msm8916: Enable CoreSight STM component

Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916,
which can benefit the CoreSight development on DB410c.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210321124212.4253-1-leo.yan@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: Add qfprom node

Add the qfprom node and its properties for the sc7280 SoC.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1627627573-32454-5-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: Fixup the cpufreq node

Fixup the register regions used by the cpufreq node on SC7280 SoC to
support per core L3 DCVS.

Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: ipq6018: correct TCSR block area

According to Bjorn Andersson[1], &tcsr_q6 base is 0x01937000 with size
0x21000. Adjust qcom,halt-regs offsets (add 0xe000) to match the new
syscon base.

Also, rename to just &tcsr as Kathiravan T suggested.

[1] https://lore.kernel.org/r/YLgO0Aj1d4w9EcPv@yoga

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/889aae1b88f120cb6281919d27164a959fbe69d0.1626948070.git.baruch@tkos.co.il
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7180-trogdor: Add lpass dai link for HDMI

Add dai link in sc7180-trogdor.dtsi for supporting audio over DP

Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210721080549.28822-3-srivasam@qti.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7180: Update lpass cpu node for audio over dp

Updaate lpass dts node with HDMI reg, interrupt and iommu
for supporting audio over dp.

Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210721080549.28822-2-srivasam@qti.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sdm845-oneplus: add ipa firmware names

Add the correct patch to the ipa firmware now that custom paths are
supported.

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210720153125.43389-6-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sdm845-oneplus-common: enable debug UART

A labelled diagram showing the location of the Rx and Tx testpoints for
the OnePlus 6 is available on the postmarketOS wiki:

https://wiki.postmarketos.org/wiki/Serial_debugging:Cable_schematics

The device uses 1.8v UART at a baud rate of 115200, bootloader output is
also available here.

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210720153125.43389-3-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sm8350: Rename GENI serial engine DT node

In order to conform with downstream and upstream for previous generations
of this hardware, rename dt-node 'qupv3_id_1' to 'qupv3_id_0'.

Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20210803125756.93824-1-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: Remove pm8350 and pmr735b for sc7280-idp

Remove pm8350 and pmr735b die temp nodes as these pmics are
not present on this board.

Correct the tabbing for pmk8350_vadc node.

Fixes: fbd5a1d22607 ("arm64: dts: qcom: sc7280: Add ADC channel nodes for PMIC temperatures to sc7280-idp")
Signed-off-by: satya priya <skakit@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627995852-24505-1-git-send-email-skakit@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sc7280: Add interconnect properties for USB

Add interconnect properties in USB DT nodes for sc7280.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627880576-22391-1-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target

Remove the bus clock from the mdss device node, in order to facilitate
bus band width scaling on sm8250 target.

The parent device MDSS will not vote for bus bw, instead the vote will
be triggered by mdp device node. Since a minimum vote is required to
turn on bus clock, and since mdp device node already has the bus clock,
remove the clock from the mdss device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210803101657.1072358-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arm64: dts: qcom: sdm845: move bus clock to mdp node for sdm845 target

Move the bus clock to mdp device node,in order to facilitate bus band
width scaling on sdm845 target.

The parent device MDSS will not vote for bus bw, instead the vote will
be triggered by mdp device node. Since a minimum vote is required to
turn on bus clock, move the clock node to mdp device from where the
votes are requested.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210803101657.1072358-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>