Arnd Bergmann [Fri, 27 Nov 2020 17:04:28 +0000 (18:04 +0100)]
Merge tag 'tegra-for-5.11-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.11-rc1
This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.
* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
ARM: tegra: Add interconnect properties to Tegra124 device-tree
ARM: tegra: Add interconnect properties to Tegra30 device-tree
ARM: tegra: Add interconnect properties to Tegra20 device-tree
ARM: tegra: acer-a500: Add Embedded Controller
ARM: tegra: Change order of SATA resets for Tegra124
ARM: tegra: Correct EMC registers size in Tegra20 device-tree
ARM: tegra: Properly align clocks for SOCTHERM
ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
ARM: tegra: Populate OPP table for Tegra20 Ventana
ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
ARM: tegra: nexus7: Rename gpio-hog nodes
ARM: tegra: nexus7: Add power-supply to lvds-encoder node
ARM: tegra: nexus7: Improve CPU passive-cooling threshold
ARM: tegra: nexus7: Correct thermal zone names
...
Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 27 Nov 2020 17:03:16 +0000 (18:03 +0100)]
Merge tag 'tegra-for-5.11-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.11-rc1
This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.
* tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: bus: Convert ACONNECT doc to json-schema
dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
dt-bindings: dma: Convert ADMA doc to json-schema
dt-bindings: Fix entry name for I/O High Voltage property
dt-bindings: ARM: tegra: Add Ouya game console
dt-bindings: Add vendor prefix for Ouya Inc.
dt-bindings: memory: tegra124: Add memory client IDs
dt-bindings: memory: tegra30: Add memory client IDs
dt-bindings: memory: tegra20: Add memory client IDs
Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 27 Nov 2020 17:02:45 +0000 (18:02 +0100)]
Merge tag 'renesas-arm-dt-for-v5.11-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.11 (take two)
- PCIe endpoint support for the R-Car H3 ES2.0+ SoC.
* tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a77951: Add PCIe EP nodes
Link: https://lore.kernel.org/r/20201127132155.77418-2-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 27 Nov 2020 17:00:07 +0000 (18:00 +0100)]
Merge tag 'stm32-dt-for-v5.11-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.11, round 1
Highlights:
----------
MCU part:
-Fix dmamux reg property (length) on stm32h743.
-Explicitly set DCMI bus type on stm32429i eval board.
MPU part:
-Enable FIFO mode with half-full threshold for DCMI.
-Harmonize EHCI/OHCI nodes.
-Move SDMMC IP version to v2.0 to get features improvements.
-Add LP-timer wakeup support.
-Enable crypto/hash/crc support.
-Explicitly set DCMI bus type on stm32mp157 eval board.
-Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
(It is connected to I2C4).
-Fix dmamux reg property (length) on stm32mp151.
-Optimize USB OTG FIFO sizes on stm32mp151.
-Declare tamp node also as "simple-mfd".
-LXA:
-Document Octavo vendor-prefixes yaml file.
-Document lxa,stm32mp157c-mc1 in STM32 yaml file.
-DH:
-Connect PHY IRQ line on DH SoM.
-Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
-Document all DH compatible strings in STM32 yaml file.
-Add DHCOM based PicoITX board. This board embedds ethernet port,
USB, CAN LEDS and a custom board-to-board connector.
* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
ARM: dts: stm32: Add DHCOM based PicoITX board
dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
ARM: dts: stm32: fix dmamux reg property on stm32h743
ARM: dts: stm32: fix dmamux reg property on stm32mp151
ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
dt-bindings: connector: add typec-power-opmode property to usb-connector
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
ARM: dts: stm32: enable CRYP by default on stm32mp15
ARM: dts: stm32: enable CRC1 by default on stm32mp15
...
Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 27 Nov 2020 16:58:27 +0000 (17:58 +0100)]
Merge tag 'omap-for-v5.11/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.11 merge window
- Two non-urgent pandaboard updates to get gpio button and bluetooth
working on pandaboard-es
- Updates to follow devicetree binding docs for dwc3 and pwm-leds
- Add initial support for droid bionic based on what we have for droid4
- Add second sha instance for dra7
- Add eQEP nodes for am335x for boneblue
- Fix wrong comments for am335x gpio_31
* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
ARM: dts: am335x-boneblue: Enable eQEP
ARM: dts: am33xx: Add nodes for eQEP
ARM: dts: dra7: add second SHA instance
ARM: dts: xt875: add section for kionix kxtf9
ARM: dts: mapphone: separate out xt894 specific things
ARM: dts: omap: Fix schema warnings for pwm-leds
ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
ARM: dts: am437x: Correct DWC USB3 compatible string
ARM: dts: pandaboard es: add bluetooth uart for HCI
ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES
Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Yuya Hamamachi [Wed, 25 Nov 2020 07:33:03 +0000 (16:33 +0900)]
arm64: dts: renesas: r8a77951: Add PCIe EP nodes
Add PCIe EP nodes for R8A77951 SoC dtsi.
Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20201125073303.19057-3-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Arnd Bergmann [Thu, 26 Nov 2020 21:11:52 +0000 (22:11 +0100)]
Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
have any functional effect except passing dtschema checks or dtc W=2 builds.
* tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
arm64: dts: hisilicon: list all clocks required by pl011.yaml
arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
arm64: dts: hisilicon: normalize the node name of the UART devices
arm64: dts: hisilicon: normalize the node name of the usb devices
arm64: dts: hisilicon: normalize the node name of the SMMU devices
arm64: dts: hisilicon: place clock-names "biu" before "ciu"
arm64: dts: hisilicon: remove unused property pinctrl-names
arm64: dts: hisilicon: write the values of property-units into a uint32 array
arm64: dts: hisilicon: separate each group of data in the property "reg"
arm64: dts: hisilicon: normalize the node name of the ITS devices
Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 26 Nov 2020 21:09:35 +0000 (22:09 +0100)]
Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema including
serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
have any functional effect except passing dtschema checks or dtc W=2
builds.
* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: fix errors detected by syscon.yaml
ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
ARM: dts: hisilicon: fix errors detected by root-node.yaml
ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
ARM: dts: hisilicon: fix errors detected by usb yaml
ARM: dts: hisilicon: fix errors detected by pl011.yaml
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:23 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:22 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:21 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:20 +0000 (03:27 +0300)]
ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:19 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra124 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:18 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra30 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:17 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra20 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 16 Nov 2020 19:48:27 +0000 (22:48 +0300)]
ARM: tegra: acer-a500: Add Embedded Controller
This patch adds device-tree node for the Embedded Controller which is
found on the Picasso board. The Embedded Controller itself is ENE KB930,
it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware
that is specifically customized for the Acer A500 device.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Mon, 23 Nov 2020 20:17:20 +0000 (12:17 -0800)]
ARM: tegra: Change order of SATA resets for Tegra124
Tegra AHCI dt-binding doc is converted from text based to yaml based.
dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.
Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.
This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:16 +0000 (03:27 +0300)]
ARM: tegra: Correct EMC registers size in Tegra20 device-tree
Fix the size of Tegra20 EMC registers, which should be twice bigger.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 20 Nov 2020 20:27:12 +0000 (21:27 +0100)]
ARM: tegra: Properly align clocks for SOCTHERM
Entries on subsequent lines should be aligned with the entry on the
first line.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 20 Nov 2020 15:18:08 +0000 (16:18 +0100)]
ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.
Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nicolas Chauvet [Sun, 27 Sep 2020 15:09:52 +0000 (17:09 +0200)]
ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.
throttrip: pll: missing hot temperature
...
throttrip: mem: missing hot temperature
...
Adding them will clear the messages.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nicolas Chauvet [Sun, 27 Sep 2020 15:09:51 +0000 (17:09 +0200)]
ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
On Jetson TK1 the following message can be seen:
tegra_soctherm
700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop
This patch will fix the invalid prop issue according to the binding.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Wed, 11 Nov 2020 10:38:47 +0000 (10:38 +0000)]
ARM: tegra: Populate OPP table for Tegra20 Ventana
Commit
9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver
(Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the
generic CPUFREQ device-tree driver. Since this change CPUFREQ support
on the Tegra20 Ventana platform has been broken because the necessary
device-tree nodes with the operating point information are not populated
for this platform. Fix this by updating device-tree for Venata to
include the operating point informration for Tegra20.
Fixes:
9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:51 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
Depending on a driver probe order, panel-simple driver may probe first,
which results in this error:
panel-simple display-panel: Reject override mode: panel has a fixed mode
We don't want to use panel-simple anyways because customized timings are
preferred for Nexus 7, hence remove the panel-simple compatibles from the
panel node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:49 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Rename gpio-hog nodes
Devicetree schema now requires gpio-hog nodes to have a certain naming
pattern, like a -hog suffix. This patch fixes dtbs_check warnings about
the names.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:48 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Add power-supply to lvds-encoder node
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:47 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Improve CPU passive-cooling threshold
The current CPU thermal limit is a bit inappropriate for Nexus 7 once
device is getting used on a daily bases. For example, currently it's may
be impossible to watch a hardware accelerated 720p video without hitting
a severe CPU throttling, which ruins user experience. This patch improves
the thermal throttling thresholds.
In my experience setting CPU thermal threshold to 57C provides the most
reasonable result, where device is a bit warm under constant load and
not getting overly hot, in the same time performance is okay. Let's bump
the passive-cooling threshold from 50C to 57C and also lower the thermal
hysteresis to 0.2C in order to make throttling more reactive.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:46 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Correct thermal zone names
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:45 +0000 (17:12 +0300)]
ARM: tegra: acer-a500: Add power-supply to lvds-encoder node
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:44 +0000 (17:12 +0300)]
ARM: tegra: acer-a500: Correct thermal zone names
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Peter Geis [Sun, 4 Oct 2020 13:31:12 +0000 (13:31 +0000)]
ARM: tegra: Add device-tree for Ouya
The Ouya was the sole device produced by Ouya Inc in 2013.
It was a game console originally running Android 5 on top of Linux 3.1.10.
This patch adds the device tree supporting the Ouya.
It has been tested on the original variant with Samsung ram.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 26 Nov 2020 18:06:15 +0000 (19:06 +0100)]
Merge branch 'for-5.11/dt-bindings' into for-5.11/arm/dt
Sameer Pujar [Fri, 6 Nov 2020 15:43:33 +0000 (21:13 +0530)]
dt-bindings: bus: Convert ACONNECT doc to json-schema
Move ACONNECT documentation to YAML format.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sameer Pujar [Fri, 6 Nov 2020 15:43:32 +0000 (21:13 +0530)]
dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
Update Tegra compatibles to support newer Tegra chips and required
combinations.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sameer Pujar [Fri, 6 Nov 2020 15:43:31 +0000 (21:13 +0530)]
dt-bindings: dma: Convert ADMA doc to json-schema
Move ADMA documentation to YAML format.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:55 +0000 (19:48 +0300)]
dt-bindings: memory: tegra124: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vidya Sagar [Mon, 26 Oct 2020 06:39:01 +0000 (12:09 +0530)]
dt-bindings: Fix entry name for I/O High Voltage property
Correct the name of the I/O High Voltage Property from
'nvidia,io-high-voltage' to 'nvidia,io-hv'.
Fixes:
2585a584f844 ("pinctrl: Add Tegra194 pinctrl DT bindings")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Peter Geis [Sun, 4 Oct 2020 13:31:14 +0000 (13:31 +0000)]
dt-bindings: ARM: tegra: Add Ouya game console
Add a binding for the Tegra30-based Ouya game console.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Peter Geis [Sun, 4 Oct 2020 13:31:13 +0000 (13:31 +0000)]
dt-bindings: Add vendor prefix for Ouya Inc.
Ouya is a defunct company from 2012 to 2015.
They produced a single device, the Ouya game console.
In 2015 they were purchased by Razer Inc. and the Ouya was discontinued.
All Ouya services were shuttered in 2019.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:54 +0000 (19:48 +0300)]
dt-bindings: memory: tegra30: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:53 +0000 (19:48 +0300)]
dt-bindings: memory: tegra20: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:51 +0000 (11:25 +0100)]
ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:50 +0000 (11:25 +0100)]
dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU,
RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP
compatible is contained as well. This allows boot firmware to match
against it to apply fixups if necessary.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:49 +0000 (11:25 +0100)]
dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
Octavo Systems is an American company specializing in design and
manufacturing of System-in-Package devices.
The prefix is already in use for the Octavo Systems OSD3358-SM-RED
device tree, but was so far undocumented. Fix this.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Tue, 3 Nov 2020 18:11:37 +0000 (19:11 +0100)]
ARM: dts: stm32: Add DHCOM based PicoITX board
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Sun, 8 Nov 2020 22:14:38 +0000 (23:14 +0100)]
dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
Document devicetree compatible strings of the DH SoMs and boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Ahmad Fatoum [Wed, 21 Oct 2020 10:28:56 +0000 (12:28 +0200)]
ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].
The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.
[0]: https://github.com/STMicroelectronics/linux/commit/
2e9bfc29dd
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Ahmad Fatoum [Wed, 21 Oct 2020 10:28:55 +0000 (12:28 +0200)]
dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
The stm32mp1 TAMP (Tamper and backup registers) does tamper detection
and features 32 backup registers that, being in the RTC domain, may
survive even with Vdd switched off.
This makes it suitable for use to communicate a reboot mode from OS
to bootloader via the syscon-reboot-mode binding. Add a "simple-mfd"
to support probing such a child node. The actual reboot mode
node could then be defined in a board.dts or fixed up by the bootloader.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Arnaud Pouliquen [Wed, 14 Oct 2020 12:54:41 +0000 (14:54 +0200)]
ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.
Associated driver implementation is available in commit
9276536f455b3
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Tue, 10 Nov 2020 13:10:59 +0000 (14:10 +0100)]
ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Tue, 10 Nov 2020 14:27:37 +0000 (15:27 +0100)]
ARM: dts: stm32: fix dmamux reg property on stm32h743
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Tue, 10 Nov 2020 14:27:36 +0000 (15:27 +0100)]
ARM: dts: stm32: fix dmamux reg property on stm32mp151
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Tue, 10 Nov 2020 14:36:41 +0000 (15:36 +0100)]
ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
Update mdma1 clients channel priority level following stm32-mdma bindings.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Fri, 6 Nov 2020 16:58:04 +0000 (17:58 +0100)]
ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
This patch adds support for STUSB1600 USB Type-C port controller, used on
I2C4 on stm32mp15xx-dkx.
The default configuration on this board, on Type-C connector, is:
- Dual Power Role (DRP), so set power-role to "dual";
- Vbus limited to 500mA, so set typec-power-opmode to "default" (it means
500mA in USB 2.0).
typec-power-opmode is used to reconfigure the STUSB1600 advertising of
current capability when its NVM is not in line with the board layout.
On stm32mp15xx-dkx, Vbus power source of STUSB1600 is 5V_VIN. So power
operation mode depends on the power supply used. To avoid any power
issues, it is better to limit Vbus to 500mA on this board.
ALERT# is the interrupt pin of STUSB1600. It needs an external pull-up, and
signal is active low.
USB OTG controller ID and Vbus signals are not connected on stm32mp15xx-dkx
boards, so disconnection are not detected.
Without DWC2 usb-role-switch:
- if you unplug the USB cable from the Type-C port, you have to manually
disconnect the USB gadget:
echo disconnect > /sys/devices/platform/soc/
49000000.usb-otg/udc/
49000000.usb-otg/soft_connect
- Then you can plug the USB cable again in the Type-C port, and manually
reconnect the USB gadget:
echo connect > /sys/devices/platform/soc/
49000000.usb-otg/udc/
49000000.usb-otg/soft_connect
With DWC2 usb-role-switch, USB gadget is dynamically disconnected or connected.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Fri, 6 Nov 2020 16:58:02 +0000 (17:58 +0100)]
dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
Add binding documentation for the STMicroelectronics STUSB160x Type-C port
controller.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Amelie Delaunay [Fri, 6 Nov 2020 16:58:01 +0000 (17:58 +0100)]
dt-bindings: connector: add typec-power-opmode property to usb-connector
Power operation mode may depends on hardware design, so, add the optional
property typec-power-opmode for usb-c connector to select the power
operation mode capability.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Patrick Delaunay [Thu, 22 Oct 2020 17:38:51 +0000 (19:38 +0200)]
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
Move spi4 at the right alphabetical place within stm32mp15-pinctrl
Fixes:
4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Hugues Fruchet [Wed, 4 Nov 2020 17:32:12 +0000 (18:32 +0100)]
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Hugues Fruchet [Wed, 4 Nov 2020 17:32:11 +0000 (18:32 +0100)]
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Lionel Debieve [Thu, 5 Nov 2020 10:23:31 +0000 (11:23 +0100)]
ARM: dts: stm32: enable CRYP by default on stm32mp15
Enable CRYP1 device for cryp accelerated support on
stm32mp157C-EV1/DK2 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Nicolas Toromanoff [Thu, 5 Nov 2020 10:23:30 +0000 (11:23 +0100)]
ARM: dts: stm32: enable CRC1 by default on stm32mp15
Enable CRC1 device for CRC-32 accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Lionel Debieve [Thu, 5 Nov 2020 10:23:29 +0000 (11:23 +0100)]
ARM: dts: stm32: enable HASH by default on stm32mp15
Enable HASH1 device for HASH accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Fabrice Gasnier [Fri, 16 Oct 2020 14:40:19 +0000 (16:40 +0200)]
ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151
LP timer can be used to wakeup from stop mode on stm32mp151.
Add wakeup-source properties to all LP timer instances.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Fabrice Gasnier [Fri, 16 Oct 2020 14:40:18 +0000 (16:40 +0200)]
ARM: dts: stm32: Add LP timer irqs on stm32mp151
Add all LP timer irqs on stm32mp151.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Yann Gautier [Tue, 20 Oct 2020 14:04:51 +0000 (16:04 +0200)]
ARM: dts: stm32: update sdmmc IP version for STM32MP15
Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.
The mmci driver supports the v2.0 periph id since
7a2a98be672b ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Serge Semin [Tue, 20 Oct 2020 11:59:38 +0000 (14:59 +0300)]
ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Jisheng Zhang [Mon, 9 Nov 2020 09:05:29 +0000 (17:05 +0800)]
arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
This is to remove similar errors as below:
OF: /.../gpio-port@0: could not find phandle
Commit
7569486d79ae ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Serge Semin [Wed, 11 Nov 2020 09:15:50 +0000 (12:15 +0300)]
arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:39 +0000 (21:17 +0800)]
arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
The snps,dw-apb-uart binding need to specify two clocks: "baudclk",
"apb_pclk". But only "apb_pclk" is specified now. Because the driver
preferentially matches the first clock. Otherwise, it matches the second
clock instead of both clocks. So both of them use the same clock don't
change the function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:38 +0000 (21:17 +0800)]
arm64: dts: hisilicon: list all clocks required by pl011.yaml
The arm,pl011 binding need to specify two clocks: "uartclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:37 +0000 (21:17 +0800)]
arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:36 +0000 (21:17 +0800)]
arm64: dts: hisilicon: normalize the node name of the UART devices
Change the node name of the UART devices to match
"^serial(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:35 +0000 (21:17 +0800)]
arm64: dts: hisilicon: normalize the node name of the usb devices
Change the node name of the usb devices to match "^usb(@.*)?". These errors
are detected by generic-ehci.yaml and generic-ohci.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:34 +0000 (21:17 +0800)]
arm64: dts: hisilicon: normalize the node name of the SMMU devices
Change the node name of the SMMU devices to match "^iommu@[0-9a-f]*".
Otherwise, the errors similar to the following will be reported by
arm,smmu-v3.yaml.
smmu_pcie: $nodename:0: 'smmu_pcie' does not match '^iommu@[0-9a-f]*'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:33 +0000 (21:17 +0800)]
arm64: dts: hisilicon: place clock-names "biu" before "ciu"
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
clock-names:
items:
- const: biu
- const: ciu
The "biu" needs to be placed before the "ciu".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:32 +0000 (21:17 +0800)]
arm64: dts: hisilicon: remove unused property pinctrl-names
uart1 and uart5 are not used as pinctrl, so the property "pinctrl-names"
can be deleted. In fact, the property "pinctrl-names" depends on the
property "pinctrl-0". So the errors similar to the following will be
reported by pinctrl-consumer.yaml.
serial@
fdf00000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:31 +0000 (21:17 +0800)]
arm64: dts: hisilicon: write the values of property-units into a uint32 array
Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.
ufs@
ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:30 +0000 (21:17 +0800)]
arm64: dts: hisilicon: separate each group of data in the property "reg"
Do not write the "reg" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported by reg.yaml.
soc: dsa@
c7000000:reg:0: [0,
3305111552, 0,
8978432, 0,
3338665984, 0, \
6291456] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 13:17:29 +0000 (21:17 +0800)]
arm64: dts: hisilicon: normalize the node name of the ITS devices
Change the node name of the ITS devices to match
"^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although
"interrupt-controller" is allowed, but "msi-controller" is preferred.
Otherwise, "interrupt-controller@
b7000000: False schema does not allow"
will be reported by arm,gic-v3.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:23 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by syscon.yaml
The DT binding for system controller is not allowed to contain only the
compatible string "syscon", the Hisilicon peripheral subsystem controller
should add compatible string "hisilicon,peri-subctrl". Otherwise, the
error "compatible: ['syscon'] is too short" will be reported.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:22 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:21 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
clock-names:
items:
- const: biu
- const: ciu
The "biu" needs to be placed before the "ciu".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:20 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by root-node.yaml
Make the memory node name match the regex "^memory(@[0-9a-f]+)?$" which
is described in memory.yaml. Otherwise, it will be treated as root node,
and misreported by root-node.yaml.
Errors misreported by root-node.yaml:
/: memory: False schema does not allow {'device_type': ['memory'], 'reg':
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:19 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
Change bus node name from "amba" to "amba-bus" to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:18 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by usb yaml
1. Change node name to match '^usb(@.*)?'
These errors are detected by generic-ehci.yaml and generic-ohci.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:17 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by pl011.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same
clock.
3. Change pinctrl-names to "default", "sleep".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhen Lei [Mon, 12 Oct 2020 06:12:16 +0000 (14:12 +0800)]
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Arnd Bergmann [Mon, 23 Nov 2020 16:15:25 +0000 (17:15 +0100)]
Merge tag 'ux500-dts-for-v5.11-1' of git://git./linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS updates for the v5.11 kernels:
- Rename the DSI controllers to match the preferred
schema.
- Pull down the SDI2 feedback clock on the Skomer.
- Add proper supplies to the MaxToch touchscreen on
the Golden.
* tag 'ux500-dts-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500-golden: Add proper supplies to touchscreen
ARM: dts: ux500: skomer: Pull down SDI2 FBCLK
ARM: dts: ux500: Rename DSI controller nodes
Link: https://lore.kernel.org/r/CACRpkdY_M4xj++QhRPqX6N3x9YmFNJkz70DnvBj7Ai-dOtCJSQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tomer Maimon [Thu, 19 Nov 2020 08:00:02 +0000 (10:00 +0200)]
ARM: dts: add Nuvoton NPCM730 device tree
Add Nuvoton NPCM730 SoC device tree.
The Nuvoton NPCN730 SoC is a part of the
Nuvoton NPCM7xx SoCs family.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Benjamin Fair <benjaminfair@google.com>
Link: https://lore.kernel.org/r/20201119080002.100342-1-tmaimon77@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 23 Nov 2020 15:52:04 +0000 (16:52 +0100)]
Merge tag 'samsung-dt-5.11' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.11
1. Many cleanups of DTS and alignments to dtschema. Most of them do not
have any functional effect except passing dtschema checks or dtc W=2
builds.
2. Fix USB 3.0 ports on Odroid XU board: wrong roles assigned to two
ports, missing supply to the USB over-current and VBUS control pins
and finally missing pin configuration for these pins.
3. Switch Exynos5422 DMC driver to monitoring/polling mode, instead of
using interrupts.
4. Correct the usage of "opp-shared" properties which lead to disabling
the bus frequency and voltage scaling.
5. Enable Bluetooth on few Exynos4210 and Exynos4412 boards.
6. Enable dual-role USB on Odroid U3+ board.
7. Add Ethernet description in multiple Odroid DTS allowing also easy
MAC address filling by bootloader.
8. Add Ethernet to Artik 5 (Exynos3250) board.
9. Add interconnect properties to Exynos4412 to fix old Mixer issues.
* tag 'samsung-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (36 commits)
ARM: dts: exynos: use hyphens in MFC reserved memory node names
ARM: dts: exynos: use hyphens in Exynos5 node names
ARM: dts: exynos: use generic name for max77693 motor in Midas
ARM: dts: exynos: use hyphens in Exynos4 node names
ARM: dts: exynos: use hyphens in Exynos3250 node names
ARM: dts: exynos: Add interconnects to Exynos4412 mixer
ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes
ARM: dts: exynos: Add Ethernet to Artik 5 board
ARM: dts: exynos: Add a placeholder for a MAC address
ARM: dts: exynos: Add Ethernet interface description for Odroid X/X2
ARM: dts: exynos: Add Ethernet interface description for Odroid U3
ARM: dts: exynos: Add Ethernet interface description for Odroid XU
ARM: dts: exynos: Add Ethernet interface description for Odroid XU3 Lite
ARM: dts: exynos: Enable DWC2 dual-role support on OdroidU3+ boards
ARM: dts: s5pv210: adjust node names to DT spec
ARM: dts: exynos: adjust node names to DT spec in Exynos542x boards
ARM: dts: exynos: adjust node names to DT spec in Odroid XU
ARM: dts: exynos: adjust node names to DT spec in Exynos5250 boards
ARM: dts: exynos: remove redundant status=okay in Exynos4412 boards
ARM: dts: exynos: adjust node names to DT spec in Exynos4412 boards
...
Link: https://lore.kernel.org/r/20201113162211.10020-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 23 Nov 2020 15:50:35 +0000 (16:50 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.11-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.11
- Document suport for the R-Car M3-W+ ULCB/Kingfisher board combo.
* tag 'renesas-dt-bindings-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add R-Car M3-W+ ULCB with Kingfisher
Link: https://lore.kernel.org/r/20201113150854.3923885-5-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 23 Nov 2020 15:48:48 +0000 (16:48 +0100)]
Merge tag 'renesas-arm-dt-for-v5.11-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.11
- Touch screen and OV5640 camera support for the iWave RainboW Qseven
board (G21D), and its camera expansion board,
- Support for the AISTARVISION MIPI Adapter V2.1 board connected to
HiHope RZ/G2 boards,
- SPI (MSIOF) support for the R-Car M3-W+ SoC,
- Digital Radio Interface (DRIF) support for the R-Car M3-N SoC,
- Initial support for the R-Car M3-W+ ULCB/Kingfisher board combo,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: hihope-rev4: Add a comment explaining switch SW2404
arm64: dts: renesas: r8a77961: ulcb-kf: Initial device tree
arm64: dts: renesas: r8a77961: Add CAN{0,1} placeholder nodes
arm64: dts: renesas: beacon-renesom-baseboard: Move connector node out of hd3ss3220 device
arm64: dts: renesas: cat874: Move connector node out of hd3ss3220 device
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
arm64: dts: renesas: rcar-gen3: Convert EtherAVB to explicit delay handling
arm64: dts: renesas: r8a77965: Add DRIF support
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2N
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2M
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2H
arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Add parent macro for each sensor
arm64: dts: renesas: cat875: Remove rxc-skew-ps from ethernet-phy node
arm64: dts: renesas: hihope-rzg2-ex: Drop rxc-skew-ps from ethernet-phy node
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Enable VIN instances
arm64: dts: renesas: r8a77961: Add MSIOF nodes
arm64: dts: renesas: Align GPIO hog names with dtschema
ARM: dts: r8a7742-iwg21d-q7: Add LCD support
Link: https://lore.kernel.org/r/20201113150854.3923885-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linus Walleij [Fri, 20 Nov 2020 12:42:12 +0000 (13:42 +0100)]
ARM: dts: ux500-golden: Add proper supplies to touchscreen
This sets up the Atmel maXTouch touchscreen to use proper
VDDA and VDD supplies as now supported by bindings and
driver.
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Nick Reitemeyer <nick.reitemeyer@web.de>
Cc: Nick Dyer <nick@shmanahar.org>
Link: https://lore.kernel.org/r/20201120124212.1086063-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Vasut [Thu, 8 Oct 2020 19:38:00 +0000 (21:38 +0200)]
ARM: dts: stm32: Add KS8851 on FMC2 to STM32MP1 DHCOM
Add bindings for the KS8851 ethernet present on the STM32MP1 DHCOM SoM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Thu, 8 Oct 2020 19:37:59 +0000 (21:37 +0200)]
ARM: dts: stm32: Add alternate pinmux for FMC EBI bus
Add another mux option for FMC EBI bus, this is used on DHCOM SoM
for the second ethernet and on the PDK2 devkit for SRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Thu, 8 Oct 2020 19:36:18 +0000 (21:36 +0200)]
ARM: dts: stm32: Connect PHY IRQ line on DH STM32MP1 SoM
On the production DHCOM STM32MP15xx SoM, the PHY IRQ line is connected
to the PI11 pin. Describe it in the DT as well, so the PHY IRQ can be
used e.g. to detect cable insertion and removal.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Hugues Fruchet [Thu, 8 Oct 2020 09:09:42 +0000 (11:09 +0200)]
ARM: dts: stm32: fix DCMI DMA features on stm32mp15 family
Enable FIFO mode with half-full threshold.
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Alexander Shiyan [Wed, 11 Nov 2020 15:59:10 +0000 (18:59 +0300)]
ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
According to AM335x datasheet pin AM335X_PIN_GPMC_WPN in MODE7 works as
GPIO0[31].
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
David Lechner [Mon, 12 Oct 2020 21:12:28 +0000 (16:12 -0500)]
ARM: dts: am335x-boneblue: Enable eQEP
This enables the Enhanced Quadrature Encoder Pulse (eQEP) module for
connectors E1, E2 and E3 on BeagleBone Blue.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
David Lechner [Mon, 12 Oct 2020 21:12:27 +0000 (16:12 -0500)]
ARM: dts: am33xx: Add nodes for eQEP
This adds new nodes for the Texas Instruments Enhanced Quadrature
Encoder Pulse (eQEP) module in the PWM subsystem on AM33XX.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>