ARM: tegra: Add EMC OPP properties to Tegra20 device-trees

Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index 9dafd3d..3287ff8 100644 (file)
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -1468,3 +1468,8 @@
                };
        };
 };
+
+&emc_icc_dvfs_opp_table {
+       /delete-node/ opp@666000000;
+       /delete-node/ opp@760000000;
+};

diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d19..585a5b4 100644 (file)
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -742,6 +742,10 @@
        };
 };
 
+&emc_icc_dvfs_opp_table {
+       /delete-node/ opp@760000000;
+};
+
 &gpio {
        lan-reset-n {
                gpio-hog;

diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index ada2bed..7e49112 100644 (file)
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -662,3 +662,7 @@
                };
        };
 };
+
+&emc_icc_dvfs_opp_table {
+       /delete-node/ opp@760000000;
+};

diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
new file mode 100644 (file)
index 0000000..b84afec
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+       emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
+               compatible = "operating-points-v2";
+
+               opp@36000000 {
+                       opp-microvolt = <950000 950000 1300000>;
+                       opp-hz = /bits/ 64 <36000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@47500000 {
+                       opp-microvolt = <950000 950000 1300000>;
+                       opp-hz = /bits/ 64 <47500000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@50000000 {
+                       opp-microvolt = <950000 950000 1300000>;
+                       opp-hz = /bits/ 64 <50000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@54000000 {
+                       opp-microvolt = <950000 950000 1300000>;
+                       opp-hz = /bits/ 64 <54000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@57000000 {
+                       opp-microvolt = <950000 950000 1300000>;
+                       opp-hz = /bits/ 64 <57000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@100000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@108000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <108000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@126666000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <126666000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@150000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <150000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@190000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <190000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@216000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <216000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@300000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@333000000 {
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       opp-hz = /bits/ 64 <333000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@380000000 {
+                       opp-microvolt = <1100000 1100000 1300000>;
+                       opp-hz = /bits/ 64 <380000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@600000000 {
+                       opp-microvolt = <1200000 1200000 1300000>;
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@666000000 {
+                       opp-microvolt = <1200000 1200000 1300000>;
+                       opp-hz = /bits/ 64 <666000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+
+               opp@760000000 {
+                       opp-microvolt = <1300000 1300000 1300000>;
+                       opp-hz = /bits/ 64 <760000000>;
+                       opp-supported-hw = <0x000F>;
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 8f8ad81..6ce4981 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -6,6 +6,8 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/tegra-pmc.h>
 
+#include "tegra20-peripherals-opp.dtsi"
+
 / {
        compatible = "nvidia,tegra20";
        interrupt-parent = <&lic>;
@@ -664,6 +666,7 @@
                #size-cells = <0>;
                #interconnect-cells = <0>;
 
+               operating-points-v2 = <&emc_icc_dvfs_opp_table>;
                nvidia,memory-controller = <&mc>;
        };