arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml

The snps,dw-apb-uart binding need to specify two clocks: "baudclk",
"apb_pclk". But only "apb_pclk" is specified now. Because the driver
preferentially matches the first clock. Otherwise, it matches the second
clock instead of both clocks. So both of them use the same clock don't
change the function.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 26caf09..c073d6d 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -300,8 +300,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0x0 0x80300000 0x0 0x10000>;
                        interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&refclk200mhz>;
-                       clock-names = "apb_pclk";
+                       clocks = <&refclk200mhz>, <&refclk200mhz>;
+                       clock-names = "baudclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -311,8 +311,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0x0 0x80310000 0x0 0x10000>;
                        interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&refclk200mhz>;
-                       clock-names = "apb_pclk";
+                       clocks = <&refclk200mhz>, <&refclk200mhz>;
+                       clock-names = "baudclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";