arm64: dts: hisilicon: write the values of property-units into a uint32 array
authorZhen Lei <thunder.leizhen@huawei.com>
Mon, 12 Oct 2020 13:17:31 +0000 (21:17 +0800)
committerWei Xu <xuwei5@hisilicon.com>
Tue, 24 Nov 2020 12:06:17 +0000 (20:06 +0800)
Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.

ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
arch/arm64/boot/dts/hisilicon/hi3670.dtsi
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

index 994140f..3f6b171 100644 (file)
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
                                <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
                        clock-names = "ref_clk", "phy_clk";
-                       freq-table-hz = <0 0>, <0 0>;
+                       freq-table-hz = <0 0
+                                        0 0>;
                        /* offset: 0x84; bit: 12 */
                        resets = <&crg_rst 0x84 12>;
                        reset-names = "rst";
index 2dcffa3..668977d 100644 (file)
                        clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
                                <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
                        clock-names = "ref_clk", "phy_clk";
-                       freq-table-hz = <0 0>, <0 0>;
+                       freq-table-hz = <0 0
+                                        0 0>;
                        /* offset: 0x84; bit: 12 */
                        resets = <&crg_rst 0x84 12>;
                        reset-names = "rst";
index 12bc1d3..993998a 100644 (file)
                        gmacphyrst: reset-controller {
                                compatible = "ti,syscon-reset";
                                #reset-cells = <1>;
-                               ti,reset-bits =
-                                       <0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR |
-                                        DEASSERT_SET|STATUS_NONE)>,
-                                       <0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR |
-                                        DEASSERT_SET|STATUS_NONE)>;
+                               ti,reset-bits = <
+                                       0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
+                                       0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
+                               >;
                        };
                };