arm64: mte: rename gcr_user_excl to mte_ctrl
authorPeter Collingbourne <pcc@google.com>
Tue, 27 Jul 2021 20:52:55 +0000 (13:52 -0700)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 28 Jul 2021 17:33:19 +0000 (18:33 +0100)
We are going to use this field to store more data. To prepare for
that, rename it and change the users to rely on the bit position of
gcr_user_excl in mte_ctrl.

Link: https://linux-review.googlesource.com/id/Ie1fd18e480100655f5d22137f5b22f4f3a9f9e2e
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210727205300.2554659-2-pcc@google.com
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/processor.h
arch/arm64/kernel/asm-offsets.c
arch/arm64/kernel/entry.S
arch/arm64/kernel/mte.c

index b6517fd..54d3427 100644 (file)
@@ -16,6 +16,9 @@
  */
 #define NET_IP_ALIGN   0
 
+#define MTE_CTRL_GCR_USER_EXCL_SHIFT   0
+#define MTE_CTRL_GCR_USER_EXCL_MASK    0xffff
+
 #ifndef __ASSEMBLY__
 
 #include <linux/build_bug.h>
@@ -153,7 +156,7 @@ struct thread_struct {
 #endif
 #endif
 #ifdef CONFIG_ARM64_MTE
-       u64                     gcr_user_excl;
+       u64                     mte_ctrl;
 #endif
        u64                     sctlr_user;
 };
index c856706..551427a 100644 (file)
@@ -52,7 +52,7 @@ int main(void)
   DEFINE(THREAD_KEYS_KERNEL,   offsetof(struct task_struct, thread.keys_kernel));
 #endif
 #ifdef CONFIG_ARM64_MTE
-  DEFINE(THREAD_GCR_EL1_USER,  offsetof(struct task_struct, thread.gcr_user_excl));
+  DEFINE(THREAD_MTE_CTRL,      offsetof(struct task_struct, thread.mte_ctrl));
 #endif
   BLANK();
   DEFINE(S_X0,                 offsetof(struct pt_regs, regs[0]));
index 5cf1601..4b779f1 100644 (file)
@@ -175,7 +175,7 @@ alternative_else_nop_endif
         * the RRND (bit[16]) setting.
         */
        mrs_s   \tmp2, SYS_GCR_EL1
-       bfi     \tmp2, \tmp, #0, #16
+       bfxil   \tmp2, \tmp, #MTE_CTRL_GCR_USER_EXCL_SHIFT, #16
        msr_s   SYS_GCR_EL1, \tmp2
 #endif
        .endm
@@ -198,7 +198,7 @@ alternative_else_nop_endif
 alternative_if_not ARM64_MTE
        b       1f
 alternative_else_nop_endif
-       ldr     \tmp, [\tsk, #THREAD_GCR_EL1_USER]
+       ldr     \tmp, [\tsk, #THREAD_MTE_CTRL]
 
        mte_set_gcr \tmp, \tmp2
 1:
index 36f51b0..a526955 100644 (file)
@@ -195,7 +195,7 @@ void mte_check_tfsr_el1(void)
 
 static void set_gcr_el1_excl(u64 excl)
 {
-       current->thread.gcr_user_excl = excl;
+       current->thread.mte_ctrl = excl;
 
        /*
         * SYS_GCR_EL1 will be set to current->thread.gcr_user_excl value
@@ -260,8 +260,8 @@ void mte_suspend_exit(void)
 long set_mte_ctrl(struct task_struct *task, unsigned long arg)
 {
        u64 sctlr = task->thread.sctlr_user & ~SCTLR_EL1_TCF0_MASK;
-       u64 gcr_excl = ~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) &
-                      SYS_GCR_EL1_EXCL_MASK;
+       u64 mte_ctrl = (~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) &
+                       SYS_GCR_EL1_EXCL_MASK) << MTE_CTRL_GCR_USER_EXCL_SHIFT;
 
        if (!system_supports_mte())
                return 0;
@@ -282,10 +282,10 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg)
 
        if (task != current) {
                task->thread.sctlr_user = sctlr;
-               task->thread.gcr_user_excl = gcr_excl;
+               task->thread.mte_ctrl = mte_ctrl;
        } else {
                set_task_sctlr_el1(sctlr);
-               set_gcr_el1_excl(gcr_excl);
+               set_gcr_el1_excl(mte_ctrl);
        }
 
        return 0;
@@ -294,7 +294,9 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg)
 long get_mte_ctrl(struct task_struct *task)
 {
        unsigned long ret;
-       u64 incl = ~task->thread.gcr_user_excl & SYS_GCR_EL1_EXCL_MASK;
+       u64 mte_ctrl = task->thread.mte_ctrl;
+       u64 incl = (~mte_ctrl >> MTE_CTRL_GCR_USER_EXCL_SHIFT) &
+                  SYS_GCR_EL1_EXCL_MASK;
 
        if (!system_supports_mte())
                return 0;