arch/arm64/include/asm/processor.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Based on arch/arm/include/asm/processor.h
   4  *
   5  * Copyright (C) 1995-1999 Russell King
   6  * Copyright (C) 2012 ARM Ltd.
   7  */
   8 #ifndef __ASM_PROCESSOR_H
   9 #define __ASM_PROCESSOR_H
  10
  11 /*
  12  * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
  13  * no point in shifting all network buffers by 2 bytes just to make some IP
  14  * header fields appear aligned in memory, potentially sacrificing some DMA
  15  * performance on some platforms.
  16  */
  17 #define NET_IP_ALIGN    0
  18
  19 #define MTE_CTRL_GCR_USER_EXCL_SHIFT    0
  20 #define MTE_CTRL_GCR_USER_EXCL_MASK     0xffff
  21
  22 #ifndef __ASSEMBLY__
  23
  24 #include <linux/build_bug.h>
  25 #include <linux/cache.h>
  26 #include <linux/init.h>
  27 #include <linux/stddef.h>
  28 #include <linux/string.h>
  29 #include <linux/thread_info.h>
  30
  31 #include <vdso/processor.h>
  32
  33 #include <asm/alternative.h>
  34 #include <asm/cpufeature.h>
  35 #include <asm/hw_breakpoint.h>
  36 #include <asm/kasan.h>
  37 #include <asm/lse.h>
  38 #include <asm/pgtable-hwdef.h>
  39 #include <asm/pointer_auth.h>
  40 #include <asm/ptrace.h>
  41 #include <asm/spectre.h>
  42 #include <asm/types.h>
  43
  44 /*
  45  * TASK_SIZE - the maximum size of a user space task.
  46  * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  47  */
  48
  49 #define DEFAULT_MAP_WINDOW_64   (UL(1) << VA_BITS_MIN)
  50 #define TASK_SIZE_64            (UL(1) << vabits_actual)
  51 #define TASK_SIZE_MAX           (UL(1) << VA_BITS)
  52
  53 #ifdef CONFIG_COMPAT
  54 #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
  55 /*
  56  * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
  57  * by the compat vectors page.
  58  */
  59 #define TASK_SIZE_32            UL(0x100000000)
  60 #else
  61 #define TASK_SIZE_32            (UL(0x100000000) - PAGE_SIZE)
  62 #endif /* CONFIG_ARM64_64K_PAGES */
  63 #define TASK_SIZE               (test_thread_flag(TIF_32BIT) ? \
  64                                 TASK_SIZE_32 : TASK_SIZE_64)
  65 #define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  66                                 TASK_SIZE_32 : TASK_SIZE_64)
  67 #define DEFAULT_MAP_WINDOW      (test_thread_flag(TIF_32BIT) ? \
  68                                 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
  69 #else
  70 #define TASK_SIZE               TASK_SIZE_64
  71 #define DEFAULT_MAP_WINDOW      DEFAULT_MAP_WINDOW_64
  72 #endif /* CONFIG_COMPAT */
  73
  74 #ifdef CONFIG_ARM64_FORCE_52BIT
  75 #define STACK_TOP_MAX           TASK_SIZE_64
  76 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 4))
  77 #else
  78 #define STACK_TOP_MAX           DEFAULT_MAP_WINDOW_64
  79 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
  80 #endif /* CONFIG_ARM64_FORCE_52BIT */
  81
  82 #ifdef CONFIG_COMPAT
  83 #define AARCH32_VECTORS_BASE    0xffff0000
  84 #define STACK_TOP               (test_thread_flag(TIF_32BIT) ? \
  85                                 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  86 #else
  87 #define STACK_TOP               STACK_TOP_MAX
  88 #endif /* CONFIG_COMPAT */
  89
  90 #ifndef CONFIG_ARM64_FORCE_52BIT
  91 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
  92                                 DEFAULT_MAP_WINDOW)
  93
  94 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
  95                                         base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
  96                                         base)
  97 #endif /* CONFIG_ARM64_FORCE_52BIT */
  98
  99 extern phys_addr_t arm64_dma_phys_limit;
 100 #define ARCH_LOW_ADDRESS_LIMIT  (arm64_dma_phys_limit - 1)
 101
 102 struct debug_info {
 103 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 104         /* Have we suspended stepping by a debugger? */
 105         int                     suspended_step;
 106         /* Allow breakpoints and watchpoints to be disabled for this thread. */
 107         int                     bps_disabled;
 108         int                     wps_disabled;
 109         /* Hardware breakpoints pinned to this task. */
 110         struct perf_event       *hbp_break[ARM_MAX_BRP];
 111         struct perf_event       *hbp_watch[ARM_MAX_WRP];
 112 #endif
 113 };
 114
 115 struct cpu_context {
 116         unsigned long x19;
 117         unsigned long x20;
 118         unsigned long x21;
 119         unsigned long x22;
 120         unsigned long x23;
 121         unsigned long x24;
 122         unsigned long x25;
 123         unsigned long x26;
 124         unsigned long x27;
 125         unsigned long x28;
 126         unsigned long fp;
 127         unsigned long sp;
 128         unsigned long pc;
 129 };
 130
 131 struct thread_struct {
 132         struct cpu_context      cpu_context;    /* cpu context */
 133
 134         /*
 135          * Whitelisted fields for hardened usercopy:
 136          * Maintainers must ensure manually that this contains no
 137          * implicit padding.
 138          */
 139         struct {
 140                 unsigned long   tp_value;       /* TLS register */
 141                 unsigned long   tp2_value;
 142                 struct user_fpsimd_state fpsimd_state;
 143         } uw;
 144
 145         unsigned int            fpsimd_cpu;
 146         void                    *sve_state;     /* SVE registers, if any */
 147         unsigned int            sve_vl;         /* SVE vector length */
 148         unsigned int            sve_vl_onexec;  /* SVE vl after next exec */
 149         unsigned long           fault_address;  /* fault info */
 150         unsigned long           fault_code;     /* ESR_EL1 value */
 151         struct debug_info       debug;          /* debugging */
 152 #ifdef CONFIG_ARM64_PTR_AUTH
 153         struct ptrauth_keys_user        keys_user;
 154 #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
 155         struct ptrauth_keys_kernel      keys_kernel;
 156 #endif
 157 #endif
 158 #ifdef CONFIG_ARM64_MTE
 159         u64                     mte_ctrl;
 160 #endif
 161         u64                     sctlr_user;
 162 };
 163
 164 #define SCTLR_USER_MASK                                                        \
 165         (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB |   \
 166          SCTLR_EL1_TCF0_MASK)
 167
 168 static inline void arch_thread_struct_whitelist(unsigned long *offset,
 169                                                 unsigned long *size)
 170 {
 171         /* Verify that there is no padding among the whitelisted fields: */
 172         BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
 173                      sizeof_field(struct thread_struct, uw.tp_value) +
 174                      sizeof_field(struct thread_struct, uw.tp2_value) +
 175                      sizeof_field(struct thread_struct, uw.fpsimd_state));
 176
 177         *offset = offsetof(struct thread_struct, uw);
 178         *size = sizeof_field(struct thread_struct, uw);
 179 }
 180
 181 #ifdef CONFIG_COMPAT
 182 #define task_user_tls(t)                                                \
 183 ({                                                                      \
 184         unsigned long *__tls;                                           \
 185         if (is_compat_thread(task_thread_info(t)))                      \
 186                 __tls = &(t)->thread.uw.tp2_value;                      \
 187         else                                                            \
 188                 __tls = &(t)->thread.uw.tp_value;                       \
 189         __tls;                                                          \
 190  })
 191 #else
 192 #define task_user_tls(t)        (&(t)->thread.uw.tp_value)
 193 #endif
 194
 195 /* Sync TPIDR_EL0 back to thread_struct for current */
 196 void tls_preserve_current_state(void);
 197
 198 #define INIT_THREAD {                           \
 199         .fpsimd_cpu = NR_CPUS,                  \
 200 }
 201
 202 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
 203 {
 204         memset(regs, 0, sizeof(*regs));
 205         forget_syscall(regs);
 206         regs->pc = pc;
 207
 208         if (system_uses_irq_prio_masking())
 209                 regs->pmr_save = GIC_PRIO_IRQON;
 210 }
 211
 212 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
 213                                 unsigned long sp)
 214 {
 215         start_thread_common(regs, pc);
 216         regs->pstate = PSR_MODE_EL0t;
 217         spectre_v4_enable_task_mitigation(current);
 218         regs->sp = sp;
 219 }
 220
 221 #ifdef CONFIG_COMPAT
 222 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
 223                                        unsigned long sp)
 224 {
 225         start_thread_common(regs, pc);
 226         regs->pstate = PSR_AA32_MODE_USR;
 227         if (pc & 1)
 228                 regs->pstate |= PSR_AA32_T_BIT;
 229
 230 #ifdef __AARCH64EB__
 231         regs->pstate |= PSR_AA32_E_BIT;
 232 #endif
 233
 234         spectre_v4_enable_task_mitigation(current);
 235         regs->compat_sp = sp;
 236 }
 237 #endif
 238
 239 static inline bool is_ttbr0_addr(unsigned long addr)
 240 {
 241         /* entry assembly clears tags for TTBR0 addrs */
 242         return addr < TASK_SIZE;
 243 }
 244
 245 static inline bool is_ttbr1_addr(unsigned long addr)
 246 {
 247         /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
 248         return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
 249 }
 250
 251 /* Forward declaration, a strange C thing */
 252 struct task_struct;
 253
 254 /* Free all resources held by a thread. */
 255 extern void release_thread(struct task_struct *);
 256
 257 unsigned long get_wchan(struct task_struct *p);
 258
 259 void set_task_sctlr_el1(u64 sctlr);
 260
 261 /* Thread switching */
 262 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
 263                                          struct task_struct *next);
 264
 265 #define task_pt_regs(p) \
 266         ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
 267
 268 #define KSTK_EIP(tsk)   ((unsigned long)task_pt_regs(tsk)->pc)
 269 #define KSTK_ESP(tsk)   user_stack_pointer(task_pt_regs(tsk))
 270
 271 /*
 272  * Prefetching support
 273  */
 274 #define ARCH_HAS_PREFETCH
 275 static inline void prefetch(const void *ptr)
 276 {
 277         asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
 278 }
 279
 280 #define ARCH_HAS_PREFETCHW
 281 static inline void prefetchw(const void *ptr)
 282 {
 283         asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
 284 }
 285
 286 #define ARCH_HAS_SPINLOCK_PREFETCH
 287 static inline void spin_lock_prefetch(const void *ptr)
 288 {
 289         asm volatile(ARM64_LSE_ATOMIC_INSN(
 290                      "prfm pstl1strm, %a0",
 291                      "nop") : : "p" (ptr));
 292 }
 293
 294 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
 295 extern void __init minsigstksz_setup(void);
 296
 297 /*
 298  * Not at the top of the file due to a direct #include cycle between
 299  * <asm/fpsimd.h> and <asm/processor.h>.  Deferring this #include
 300  * ensures that contents of processor.h are visible to fpsimd.h even if
 301  * processor.h is included first.
 302  *
 303  * These prctl helpers are the only things in this file that require
 304  * fpsimd.h.  The core code expects them to be in this header.
 305  */
 306 #include <asm/fpsimd.h>
 307
 308 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
 309 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
 310 #define SVE_GET_VL()    sve_get_current_vl()
 311
 312 /* PR_PAC_RESET_KEYS prctl */
 313 #define PAC_RESET_KEYS(tsk, arg)        ptrauth_prctl_reset_keys(tsk, arg)
 314
 315 /* PR_PAC_{SET,GET}_ENABLED_KEYS prctl */
 316 #define PAC_SET_ENABLED_KEYS(tsk, keys, enabled)                                \
 317         ptrauth_set_enabled_keys(tsk, keys, enabled)
 318 #define PAC_GET_ENABLED_KEYS(tsk) ptrauth_get_enabled_keys(tsk)
 319
 320 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
 321 /* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
 322 long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
 323 long get_tagged_addr_ctrl(struct task_struct *task);
 324 #define SET_TAGGED_ADDR_CTRL(arg)       set_tagged_addr_ctrl(current, arg)
 325 #define GET_TAGGED_ADDR_CTRL()          get_tagged_addr_ctrl(current)
 326 #endif
 327
 328 /*
 329  * For CONFIG_GCC_PLUGIN_STACKLEAK
 330  *
 331  * These need to be macros because otherwise we get stuck in a nightmare
 332  * of header definitions for the use of task_stack_page.
 333  */
 334
 335 #define current_top_of_stack()                                                          \
 336 ({                                                                                      \
 337         struct stack_info _info;                                                        \
 338         BUG_ON(!on_accessible_stack(current, current_stack_pointer, 1, &_info));        \
 339         _info.high;                                                                     \
 340 })
 341 #define on_thread_stack()       (on_task_stack(current, current_stack_pointer, 1, NULL))
 342
 343 #endif /* __ASSEMBLY__ */
 344 #endif /* __ASM_PROCESSOR_H */