perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes
authorPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Aug 2022 22:04:02 +0000 (15:04 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 12 Aug 2022 14:17:38 +0000 (07:17 -0700)
commit9801002f76c63327cae6e90097d3d0afb1e1b562
tree5ed9a44c151cb710b7c7e8343cb2e59e27443f8d
parent7ab52f75a9cf7fed7ba85802b986825dd72df641
parentf829ee7595b5e9a9e5e1cc802224391c61072b38
perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes

A series of mostly-independent fixes and cleanups for the RISC-V PMU
drivers.

Link: https://lore.kernel.org/lkml/CAAhSdy23vE8+HxU5Jxy2rBMjy3rBTrJt_4sriuROac_sEESSVw@mail.gmail.com/T/#m9de15aef1b65ae6155fa33ea1239578ef463c2a2
* palmer/riscv-pmu:
  RISC-V: Improve SBI definitions
  RISC-V: Move counter info definition to sbi header file
  RISC-V: Fix SBI PMU calls for RV32
  RISC-V: Update user page mapping only once during start
  RISC-V: Fix counter restart during overflow for RV32
drivers/perf/riscv_pmu.c
drivers/perf/riscv_pmu_sbi.c