1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
4 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
9 #include "imx6q-dhcom-som.dtsi"
10 #include <dt-bindings/leds/common.h>
13 model = "Freescale i.MX6 Quad DHCOM Premium Developer Kit (2)";
14 compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som", "fsl,imx6q";
17 stdout-path = "serial0:115200n8";
20 clk_ext_audio_codec: clock-codec {
22 clock-frequency = <24000000>;
23 compatible = "fixed-clock";
26 display_bl: display-bl {
27 brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
28 compatible = "pwm-backlight";
29 default-brightness-level = <8>;
30 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
31 pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
38 compatible = "fsl,imx-parallel-display";
39 interface-pix-fmt = "rgb24";
40 pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
41 pinctrl-names = "default";
47 lcd_display_in: endpoint {
48 remote-endpoint = <&ipu1_di0_disp0>;
55 lcd_display_out: endpoint {
56 remote-endpoint = <&lcd_panel_in>;
63 compatible = "gpio-keys";
66 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
69 pinctrl-0 = <&pinctrl_dhcom_a>;
70 pinctrl-names = "default";
75 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
78 pinctrl-0 = <&pinctrl_dhcom_b>;
79 pinctrl-names = "default";
84 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
87 pinctrl-0 = <&pinctrl_dhcom_c>;
88 pinctrl-names = "default";
93 gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
96 pinctrl-0 = <&pinctrl_dhcom_d>;
97 pinctrl-names = "default";
103 compatible = "gpio-leds";
106 * Disable led-5, because GPIO E is
107 * already used as touch interrupt.
110 color = <LED_COLOR_ID_GREEN>;
111 default-state = "off";
112 function = LED_FUNCTION_INDICATOR;
113 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
114 pinctrl-0 = <&pinctrl_dhcom_e>;
115 pinctrl-names = "default";
120 color = <LED_COLOR_ID_GREEN>;
121 default-state = "off";
122 function = LED_FUNCTION_INDICATOR;
123 gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
124 pinctrl-0 = <&pinctrl_dhcom_f>;
125 pinctrl-names = "default";
129 color = <LED_COLOR_ID_GREEN>;
130 default-state = "off";
131 function = LED_FUNCTION_INDICATOR;
132 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
133 pinctrl-0 = <&pinctrl_dhcom_h>;
134 pinctrl-names = "default";
138 color = <LED_COLOR_ID_GREEN>;
139 default-state = "off";
140 function = LED_FUNCTION_INDICATOR;
141 gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
142 pinctrl-0 = <&pinctrl_dhcom_i>;
143 pinctrl-names = "default";
148 backlight = <&display_bl>;
149 compatible = "edt,etm0700g0edh6";
152 lcd_panel_in: endpoint {
153 remote-endpoint = <&lcd_display_out>;
159 audio-codec = <&sgtl5000>;
161 "MIC_IN", "Mic Jack",
162 "Mic Jack", "Mic Bias",
163 "LINE_IN", "Line In Jack",
164 "Headphone Jack", "HP_OUT";
165 compatible = "fsl,imx-audio-sgtl5000";
166 model = "imx-sgtl5000";
169 ssi-controller = <&ssi1>;
174 pinctrl-0 = <&pinctrl_audmux_ext>;
175 pinctrl-names = "default";
188 /delete-node/ ðphy0;
191 phy-handle = <ðphy7>;
192 pinctrl-0 = <&pinctrl_enet_1G>;
193 pinctrl-names = "default";
197 #address-cells = <1>;
200 ethphy7: ethernet-phy@7 { /* KSZ 9021 */
201 compatible = "ethernet-phy-ieee802.3-c22";
202 interrupt-parent = <&gpio1>;
203 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
204 pinctrl-0 = <&pinctrl_ethphy7>;
205 pinctrl-names = "default";
207 reset-assert-us = <1000>;
208 reset-deassert-us = <1000>;
209 reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
210 rxc-skew-ps = <3000>;
216 txc-skew-ps = <3000>;
227 ddc-i2c-bus = <&i2c2>;
233 #sound-dai-cells = <0>;
234 clocks = <&clk_ext_audio_codec>;
235 compatible = "fsl,sgtl5000";
237 VDDA-supply = <®_3p3v>;
238 VDDIO-supply = <&sw2_reg>;
242 compatible = "edt,edt-ft5406";
243 interrupt-parent = <&gpio4>;
244 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
245 pinctrl-0 = <&pinctrl_dhcom_e>;
246 pinctrl-names = "default";
252 remote-endpoint = <&lcd_display_in>;
256 pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
257 reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
262 pinctrl-0 = <&pinctrl_pwm1>;
263 pinctrl-names = "default";
275 &usdhc3 { /* Micro SD card on module */
282 * The following DHCOM GPIOs are used on this board.
283 * Therefore, they have been removed from the list below.
290 * G: backlight enable
296 &pinctrl_dhcom_k &pinctrl_dhcom_l
297 &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
298 &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
299 &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
300 &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
302 pinctrl-names = "default";
304 pinctrl_audmux_ext: audmux-ext-grp {
306 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
307 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
308 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
309 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
313 pinctrl_enet_1G: enet-1G-grp {
315 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
316 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
317 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
318 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
319 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
320 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
321 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
322 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
323 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
324 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
325 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
326 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
327 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
328 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
329 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
333 pinctrl_ethphy7: ethphy7-grp {
335 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */
336 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */
337 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */
341 pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
343 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
344 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
345 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
346 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
347 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
348 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
349 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
350 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
351 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
352 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
353 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
354 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
355 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
356 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
357 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
358 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
359 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
360 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
361 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
362 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
363 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
364 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
365 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
366 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
367 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
368 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
369 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
370 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
374 pinctrl_pwm1: pwm1-grp {
376 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1