1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
16 The Enhanced Secure Digital Host Controller on Freescale i.MX family
17 provides an interface for MMC, SD, and SDIO types of memory cards.
19 This file documents differences between the core properties described
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
45 - const: fsl,imx7d-usdhc
55 boolean, if present, indicate to use controller internal write protection.
59 $ref: /schemas/types.yaml#/definitions/uint32
61 Specify the number of delay cells for override mode.
62 This is used to set the clock delay for DLL(Delay Line) on override mode
63 to select a proper data sampling window in case the clock quality is not good
64 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
65 chapter, DLL (Delay Line) section in RM for details.
69 $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
71 Specify the voltage range in case there are software transparent level
72 shifters on the outputs of the controller. Two cells are required, first
73 cell specifies minimum slot voltage (mV), second cell specifies maximum
77 - description: value for minimum slot voltage
78 - description: value for maximum slot voltage
82 $ref: /schemas/types.yaml#/definitions/uint32
84 Specify the start delay cell point when send first CMD19 in tuning procedure.
88 $ref: /schemas/types.yaml#/definitions/uint32
90 Specify the increasing delay cell steps in tuning procedure.
91 The uSDHC use one delay cell as default increasing step to do tuning process.
92 This property allows user to change the tuning step to more than one delay
93 cells which is useful for some special boards or cards when the default
94 tuning step can't find the proper delay window within limited tuning retries.
97 fsl,strobe-dll-delay-target:
98 $ref: /schemas/types.yaml#/definitions/uint32
100 Specify the strobe dll control slave delay target.
101 This delay target programming host controller loopback read clock, and this
102 property allows user to change the delay target for the strobe input read clock.
103 If not use this property, driver default set the delay target to value 7.
104 Only eMMC HS400 mode need to take care of this property.
110 Handle clocks for the sdhc controller.
123 - const: state_100mhz
124 - const: state_200mhz
136 unevaluatedProperties: false
141 compatible = "fsl,imx51-esdhc";
142 reg = <0x70004000 0x4000>;
148 compatible = "fsl,imx51-esdhc";
149 reg = <0x70008000 0x4000>;
151 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
152 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */