1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DWC HDMI TX Encoder
10 - Mark Yao <markyao0591@gmail.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
14 with a companion PHY IP.
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
24 - rockchip,rk3328-dw-hdmi
25 - rockchip,rk3399-dw-hdmi
35 # The next three clocks are all optional, but shall be specified in this
37 - description: The HDMI CEC controller main clock
38 - description: Power for GRF IO
39 - description: External clock for some HDMI PHY
56 $ref: /schemas/types.yaml#/definitions/phandle
58 The HDMI DDC bus can be connected to either a system I2C master or the
59 functionally-reduced I2C master contained in the DWC HDMI. When connected
60 to a system I2C master this property contains a phandle to that I2C
65 description: The HDMI PHY
72 The unwedge pinctrl entry shall drive the DDC SDA line low. This is
73 intended to work around a hardware errata that can cause the DDC I2C
80 $ref: /schemas/graph.yaml#/properties/ports
84 $ref: /schemas/graph.yaml#/$defs/port-base
85 unevaluatedProperties: false
86 description: Input of the DWC HDMI TX
90 $ref: /schemas/graph.yaml#/properties/endpoint
91 description: Connection to the VOPB
94 $ref: /schemas/graph.yaml#/properties/endpoint
95 description: Connection to the VOPL
105 $ref: /schemas/types.yaml#/definitions/phandle
107 phandle to the GRF to mux vopl/vopb.
119 unevaluatedProperties: false
123 #include <dt-bindings/clock/rk3288-cru.h>
124 #include <dt-bindings/interrupt-controller/arm-gic.h>
125 #include <dt-bindings/interrupt-controller/irq.h>
127 hdmi: hdmi@ff980000 {
128 compatible = "rockchip,rk3288-dw-hdmi";
129 reg = <0xff980000 0x20000>;
131 ddc-i2c-bus = <&i2c5>;
132 rockchip,grf = <&grf>;
133 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
134 clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
135 clock-names = "iahb", "isfr";
139 #address-cells = <1>;
142 hdmi_in_vopb: endpoint@0 {
144 remote-endpoint = <&vopb_out_hdmi>;
146 hdmi_in_vopl: endpoint@1 {
148 remote-endpoint = <&vopl_out_hdmi>;