projects / linux-2.6-microblaze.git / search
| 2021-09-06 | Sean Christopherson | Revert "KVM: x86: mmu: Add guest physical address check... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210831164224.1119728-2-seanjc@google.com> |
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| 2021-09-06 | Sean Christopherson | KVM: x86/mmu: Don't freak out if pml5_root is NULL... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210824005824.205536-1-seanjc@google.com> |
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| 2021-08-20 | Sean Christopherson | KVM: x86/mmu: Drop 'shared' param from tdp_mmu_link_page() Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810224554.2978735-3-seanjc@google.com> |
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| 2021-08-20 | Sean Christopherson | KVM: x86/mmu: Avoid collision with !PRESENT SPTEs in... Signed-off-by: Sean Christopherson <seanjc@google.com> |
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| 2021-08-20 | Sean Christopherson | Revert "KVM: x86/mmu: Allow zap gfn range to operate... Signed-off-by: Sean Christopherson <seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: nVMX: Unconditionally clear nested.pi_pending... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810144526.2662272-1-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: x86: Kill off __ex() and __kvm_handle_fault_on_reboot() Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210809173955.1710866-2-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: VMX: Hide VMCS control calculators in vmx.c Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810171952.2758100-5-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: VMX: Drop caching of KVM's desired sec exec controls... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810171952.2758100-4-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: nVMX: Pull KVM L0's desired controls directly... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810171952.2758100-3-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: x86/mmu: Protect marking SPs unsync when using... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210812181815.3378104-1-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: x86/mmu: Don't step down in the TDP iterator when... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210812181414.3376143-3-seanjc@google.com> |
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| 2021-08-13 | Sean Christopherson | KVM: x86/mmu: Don't leak non-leaf SPTEs when zapping... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210812181414.3376143-2-seanjc@google.com> |
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| 2021-08-10 | Sean Christopherson | KVM: VMX: Use current VMCS to query WAITPKG support... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210810171952.2758100-2-seanjc@google.com> |
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| 2021-08-05 | Sean Christopherson | KVM: x86/mmu: Fix per-cpu counter corruption on 32... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210804214609.1096003-1-seanjc@google.com> |
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| 2021-08-04 | Sean Christopherson | KVM: SVM: Fix off-by-one indexing when nullifying last... Signed-off-by: Sean Christopherson <seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Preserve guest's CR0.CD/NW on INIT Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-47-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Drop redundant clearing of vcpu->arch.hflags... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-46-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Emulate #INIT in response to triple fault... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-45-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Move RESET-only VMWRITE sequences to init_vmcs() Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-44-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Remove redundant write to set vCPU as active... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-43-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Smush x2APIC MSR bitmap adjustments into... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-42-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Remove unnecessary initialization of msr_bitmap_mode Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-41-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Don't redo x2APIC MSR bitmaps when userspace... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-40-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: nVMX: Remove obsolete MSR bitmap refresh at nested... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-39-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Remove obsolete MSR bitmap refresh at vCPU... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-38-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Move setting of sregs during vCPU RESET/INIT... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-37-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Don't _explicitly_ reconfigure user return... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-36-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Refresh list of user return MSRs after setting... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-35-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Skip pointless MSR bitmap update when setting... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-34-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Stuff save->dr6 at during VMSA sync, not... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-33-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Drop redundant writes to vmcb->save.cr4 at... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-32-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Tweak order of cr0/cr4/efer writes at RESET... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-31-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: nVMX: Don't evaluate "emulation required" on nested... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-30-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Skip emulation required checks during pmode... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-29-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Process CR0.PG side effects after setting... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-28-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86/mmu: Skip the permission_fault() check on... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-27-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Pull GUEST_CR3 from the VMCS iff CR3 load... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-26-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: nVMX: Do not clear CR3 load/store exiting bits... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-25-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Fold ept_update_paging_mode_cr0() back into... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-24-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Remove direct write to vcpu->arch.cr0 during... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-23-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Invert handling of CR0.WP for EPT without... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-22-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Don't bother writing vmcb->save.rip at vCPU... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-21-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Move EDX initialization at vCPU RESET to... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-20-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Consolidate APIC base RESET initialization... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-19-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Open code necessary bits of kvm_lapic_set_base... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-18-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Stuff vcpu->arch.apic_base directly at vCPU... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-17-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Set BSP bit in reset BSP vCPU's APIC base... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-16-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Don't force set BSP bit when local APIC is... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-15-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Migrate the PIT only if vcpu0 is migrated... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-14-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Remove defunct BSP "update" in local APIC... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-13-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: WARN if the APIC map is dirty without an... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210713163324.627647-12-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Drop explicit MMU reset at RESET/INIT Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-9-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Remove explicit MMU reset in enter_rmode() Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-8-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Fall back to KVM's hardcoded value for EDX... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-7-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Require exact CPUID.0x1 match when stuffing... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-6-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: VMX: Set EDX at INIT with CPUID.0x1, Family-Model... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-5-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: SVM: Zero out GDTR.base and IDTR.base on INIT Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-4-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: nVMX: Set LDTR to its architecturally defined... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-3-seanjc@google.com> |
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| 2021-08-02 | Sean Christopherson | KVM: x86: Flush the guest's TLB on INIT Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-2-seanjc@google.com> |
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| 2021-07-15 | Sean Christopherson | KVM: SVM: Fix sev_pin_memory() error checks in SEV... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210506175826.2166383-3-seanjc@google.com> |
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| 2021-07-15 | Sean Christopherson | KVM: SVM: Return -EFAULT if copy_to_user() for SEV... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210506175826.2166383-2-seanjc@google.com> |
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| 2021-07-14 | Sean Christopherson | KVM: SVM: Revert clearing of C-bit on GPA in #NPF handler Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210625020354.431829-3-seanjc@google.com> |
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| 2021-07-14 | Sean Christopherson | KVM: x86/mmu: Do not apply HPA (memory encryption)... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210623230552.4027702-5-seanjc@google.com> |
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| 2021-07-14 | Sean Christopherson | KVM: x86: Use kernel's x86_phys_bits to handle reduced... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210623230552.4027702-3-seanjc@google.com> |
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| 2021-07-14 | Sean Christopherson | KVM: x86: Use guest MAXPHYADDR from CPUID.0x8000_0008... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210623230552.4027702-2-seanjc@google.com> |
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| 2021-07-14 | Sean Christopherson | Revert "KVM: x86: WARN and reject loading KVM if NX... Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210625001853.318148-1-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Let guest use GBPAGES if supported in... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-55-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Get CR4.SMEP from MMU, not vCPU, in shadow... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-54-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Get CR0.WP from MMU, not vCPU, in shadow... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-53-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Drop redundant rsvd bits reset for nested NPT Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-52-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Optimize and clean up so called "last... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-51-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86: Enhance comments for MMU roles and nested... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-50-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: WARN on any reserved SPTE value when... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-49-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Add helpers to do full reserved SPTE... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-48-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to determine PTTYPE Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-47-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Collapse 32-bit PAE and 64-bit statements... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-46-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Add a helper to calculate root from role_regs Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-45-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Add helper to update paging metadata Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-44-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Don't update nested guest's paging bitmasks... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-43-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Consolidate reset_rsvds_bits_mask() calls Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-42-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU role_regs to get LA57, and drop... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-41-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Get nested MMU's root level from the... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-40-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Drop "nx" from MMU context now that there... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-39-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to get EFER.NX during... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-38-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role/role_regs to compute context... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-37-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to detect EFER.NX in guest... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-36-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's roles to compute last non-leaf... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-35-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to compute PKRU bitmask Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-34-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to compute permission... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-33-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Drop vCPU param from reserved bits calculator Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-32-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role to get CR4.PSE for computing... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-31-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Don't grab CR4.PSE for calculating shadow... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-30-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Always set new mmu_role immediately after... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-29-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Set CR4.PKE/LA57 in MMU role iff long... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-28-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Do not set paging-related bits in MMU... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-27-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Add accessors to query mmu_role bits Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-26-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Rename "nxe" role bit to "efer_nx" for... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-25-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Use MMU's role_regs, not vCPU state,... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-24-seanjc@google.com> |
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| 2021-06-24 | Sean Christopherson | KVM: x86/mmu: Ignore CR0 and CR4 bits in nested EPT... Signed-off-by: Sean Christopherson <seanjc@google.com> ...Id: <20210622175739.3610207-23-seanjc@google.com> |
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