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2024-03-12	Dave Jiang	cxl/region: Deal with numa nodes not enumerated by... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl/region: Add memory hotplug notifier for cxl region Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl/region: Add sysfs attribute for locality attributes... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl/region: Calculate performance data for a region Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl: Set cxlmd->endpoint before adding port device Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl: Move QoS class to be calculated from the nearest CPU Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl: Split out host bridge access coordinates Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	cxl: Split out combine_coordinates() for common shared... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	ACPI: HMAT / cxl: Add retrieval of generic port coordinates... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	ACPI: HMAT: Introduce 2 levels of generic port access... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	base/node / ACPI: Enumerate node access class for ... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	ACPI: HMAT: Remove register of memory node for generic... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-21	Dan Williams	cxl/acpi: Fix load failures due to single window creation... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-21	Dan Williams	Merge branch 'for-6.8/cxl-cper' into for-6.8/cxl	commit \| commitdiff \| tree
2024-02-21	Dan Williams	acpi/ghes: Remove CXL CPER notifications Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Robert Richter	cxl/pci: Fix disabling memory if DVSEC CXL Range does... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl/test: Add support for qos_class checking Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Fix sysfs export of qos_class for memdev Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Remove unnecessary type cast in cxl_qos_class_verify() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Change 'struct cxl_memdev_state' *_perf_list to... Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Alison Schofield	cxl/region: Allow out of order assembly of autodiscovered... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Alison Schofield	cxl/region: Handle endpoint decoders in cxl_region_find_deco... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Alison Schofield	x86/numa: Fix the sort compare func used in numa_fill_memblks() Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-02-17	Alison Schofield	x86/numa: Fix the address overlap check in numa_fill_memblks() Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-29	Li Ming	cxl/pci: Skip to handle RAS errors if CXL.mem device... Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-25	Quanquan Cao	cxl/region：Fix overflow issue in alloc_hpa() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-22	Ira Weiny	cxl/pci: Skip irq features if MSI/MSI-X are not supported Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-22	Dan Williams	tools/testing/nvdimm: Disable "missing prototypes ... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-22	Dan Williams	tools/testing/cxl: Disable "missing prototypes / declaration... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-12	Shiyang Ruan	cxl/core: use sysfs_emit() for attr's _show() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-10	Dan Williams	Merge branch 'for-6.8/cxl-cper' into for-6.8/cxl	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	cxl/pci: Register for and process CPER events Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	PCI: Introduce cleanup helpers for device reference... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	acpi/ghes: Process CXL Component Events Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	cxl/events: Create a CXL event union Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	cxl/events: Separate UUID from event structures Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	cxl/events: Remove passing a UUID to known event traces Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-09	Ira Weiny	cxl/events: Create common event UUID defines Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-06	Dan Williams	Merge branch 'for-6.7/cxl' into for-6.8/cxl	commit \| commitdiff \| tree
2024-01-06	Dan Williams	Merge branch 'for-6.8/cxl-misc' into for-6.8/cxl	commit \| commitdiff \| tree
2024-01-06	Dan Williams	Merge branch 'for-6.8/cxl-cdat' into for-6.8/cxl	commit \| commitdiff \| tree
2024-01-06	Ira Weiny	cxl/events: Promote CXL event structures to a core... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Refactor to use __free() for cxl_root allocation... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Refactor to use __free() for cxl_root allocation... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Fix device reference leak in cxl_port_perf_data_calculate() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Convert find_cxl_root() to return a 'struct cxl_root *' Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Introduce put_cxl_root() helper Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-04	Dan Williams	cxl/port: Fix missing target list lock Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-04	Huang Ying	cxl/port: Fix decoder initialization when nr_targets... Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-04	Jim Harris	cxl/region: fix x9 interleave typo Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-03	Ira Weiny	cxl/trace: Pass UUID explicitly to event traces Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2024-01-02	Dan Williams	Merge branch 'for-6.8/cxl-cdat' into for-6.8/cxl	commit \| commitdiff \| tree
2024-01-02	Randy Dunlap	cxl/region: use %pap format to print resource_size_t Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-24	Alison Schofield	cxl/region: Add dev_dbg() detail on failure to allocate... Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Check qos_class validity on memdev probe Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Export sysfs attributes for memory device QoS... Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Store QTG IDs and related info to the CXL memory... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Compute the entire CXL path latency and bandwidth... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add helper function that calculate performance... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Store the access coordinates for the generic ports Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	tools/testing/cxl: Add hostbridge UID string for cxl_test... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Calculate and store PCI link latency for the downstream... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add support for _DSM Function for retrieving QTG ID Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the SSLBIS subtable from... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the DSLBIS subtable from... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the DSMAS subtables from... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add helper function to retrieve the performance... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add setting of generic port system locality... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: Break out nesting for hmat_parse_locality() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add genport target allocation to the HMAT... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Create enum for memory_target access coordinates... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	base/node / acpi: Change 'node_hmem_attrs' to 'access_coordi... Suggested-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	lib/firmware_table: tables: Add CDAT table parsing... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-18	Dave Jiang	cxl: Fix unregister_region() callback parameter assignment Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-15	Ira Weiny	cxl/pmu: Ensure put_device on pmu devices Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-09	Ira Weiny	cxl/cdat: Free correct buffer on checksum error Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-08	Dan Williams	cxl/hdm: Fix dpa translation locking Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-07	Davidlohr Bueso	cxl: Add Support for Get Timestamp Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-05	Alison Schofield	kernel/resource: Increment by align value in get_free_mem_re... Reported-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-12-05	Dave Jiang	cxl: Add cxl_num_decoders_committed() usage to cxl_test Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-11-30	Alison Schofield	cxl/memdev: Hold region_rwsem during inject and clear... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-11-30	Alison Schofield	cxl/core: Always hold region_rwsem while reading poison... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-11-23	Dave Jiang	cxl/hdm: Fix a benign lockdep splat Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-11-02	Dan Williams	lib/fw_table: Remove acpi_parse_entries_array() export Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-11-02	Terry Bowman	cxl/pci: Change CXL AER support check to use native AER Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-31	Dan Williams	cxl/hdm: Remove broken error path Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-31	Dan Carpenter	cxl/hdm: Fix && vs \|\| bug Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-31	Dan Williams	Merge branch 'for-6.7/cxl-commited' into cxl/next	commit \| commitdiff \| tree
2023-10-31	Dan Williams	Merge branch 'for-6.7/cxl' into cxl/next	commit \| commitdiff \| tree
2023-10-31	Dan Williams	Merge branch 'for-6.7/cxl-qtg' into cxl/next	commit \| commitdiff \| tree
2023-10-31	Dan Williams	Merge branch 'for-6.7/cxl-rch-eh' into cxl/next	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	acpi: Move common tables helper functions to common lib Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add support for reading CXL switch CDAT table Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add checksum verification to CDAT from CXL Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Export QTG ids from CFMWS to sysfs as qos_class... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add decoders_committed sysfs attribute to cxl_port Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add cxl_decoders_committed() helper Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Robert Richter	cxl/core/regs: Rework cxl_map_pmu_regs() to use map... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Robert Richter	cxl/core/regs: Rename phys_addr in cxl_map_component_regs() Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
2023-10-28	Robert Richter	PCI/AER: Unmask RCEC internal errors to enable RCH... Signed-off-by: Dan Williams <dan.j.williams@intel.com>	commit \| commitdiff \| tree
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