Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 28 Jun 2019 00:37:04 +0000 (08:37 +0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 28 Jun 2019 00:37:04 +0000 (08:37 +0800)
Pull ARM SoC fixes from Olof Johansson:
 "A smaller batch of fixes, nothing that stands out as risky or scary.

  Mostly DTS tweaks for a few issues:

   - GPU fixlets for Meson

   - CPU idle fix for LS1028A

   - PWM interrupt fixes for i.MX6UL

  Also, enable a driver (FSL_EDMA) on arm64 defconfig, and a warning and
  two MAINTAINER tweaks"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: imx6ul: fix PWM[1-4] interrupts
  ARM: omap2: remove incorrect __init annotation
  ARM: dts: gemini Fix up DNS-313 compatible string
  ARM: dts: Blank D-Link DIR-685 console
  arm64: defconfig: Enable FSL_EDMA driver
  arm64: dts: ls1028a: Fix CPU idle fail.
  MAINTAINERS: BCM53573: Add internal Broadcom mailing list
  MAINTAINERS: BCM2835: Add internal Broadcom mailing list
  ARM: dts: meson8b: fix the operating voltage of the Mali GPU
  ARM: dts: meson8b: drop undocumented property from the Mali GPU node
  ARM: dts: meson8: fix GPU interrupts and drop an undocumented property

MAINTAINERS
arch/arm/boot/dts/gemini-dlink-dir-685.dts
arch/arm/boot/dts/gemini-dlink-dns-313.dts
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b.dtsi
arch/arm/mach-omap2/prm3xxx.c
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
arch/arm64/configs/defconfig

index d0ed735..3c4d727 100644 (file)
@@ -3122,6 +3122,7 @@ F:        arch/arm/mach-bcm/
 BROADCOM BCM2835 ARM ARCHITECTURE
 M:     Eric Anholt <eric@anholt.net>
 M:     Stefan Wahren <wahrenst@gmx.net>
+L:     bcm-kernel-feedback-list@broadcom.com
 L:     linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 T:     git git://github.com/anholt/linux
@@ -3151,6 +3152,7 @@ F:        arch/arm/boot/dts/bcm953012*
 
 BROADCOM BCM53573 ARM ARCHITECTURE
 M:     Rafał Miłecki <rafal@milecki.pl>
+L:     bcm-kernel-feedback-list@broadcom.com
 L:     linux-arm-kernel@lists.infradead.org
 S:     Maintained
 F:     arch/arm/boot/dts/bcm53573*
index cfbfbc9..3613f05 100644 (file)
@@ -20,7 +20,7 @@
        };
 
        chosen {
-               bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+               bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
                stdout-path = "uart0:19200n8";
        };
 
index b12504e..360642a 100644 (file)
@@ -11,7 +11,7 @@
 
 / {
        model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
-       compatible = "dlink,dir-313", "cortina,gemini";
+       compatible = "dlink,dns-313", "cortina,gemini";
        #address-cells = <1>;
        #size-cells = <1>;
 
index bbf010c..a7f6d1d 100644 (file)
                        pwm1: pwm@2080000 {
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x02080000 0x4000>;
-                               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6UL_CLK_PWM1>,
                                         <&clks IMX6UL_CLK_PWM1>;
                                clock-names = "ipg", "per";
                        pwm2: pwm@2084000 {
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x02084000 0x4000>;
-                               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6UL_CLK_PWM2>,
                                         <&clks IMX6UL_CLK_PWM2>;
                                clock-names = "ipg", "per";
                        pwm3: pwm@2088000 {
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x02088000 0x4000>;
-                               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6UL_CLK_PWM3>,
                                         <&clks IMX6UL_CLK_PWM3>;
                                clock-names = "ipg", "per";
                        pwm4: pwm@208c000 {
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x0208c000 0x4000>;
-                               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6UL_CLK_PWM4>,
                                         <&clks IMX6UL_CLK_PWM4>;
                                clock-names = "ipg", "per";
index 7ef4424..40c11b6 100644 (file)
                                     <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
                        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
                        clock-names = "bus", "core";
                        operating-points-v2 = <&gpu_opp_table>;
-                       switch-delay = <0xffff>;
                };
        };
 }; /* end of / */
index 800cd65..ec67f49 100644 (file)
 
                opp-255000000 {
                        opp-hz = /bits/ 64 <255000000>;
-                       opp-microvolt = <1150000>;
+                       opp-microvolt = <1100000>;
                };
                opp-364300000 {
                        opp-hz = /bits/ 64 <364300000>;
-                       opp-microvolt = <1150000>;
+                       opp-microvolt = <1100000>;
                };
                opp-425000000 {
                        opp-hz = /bits/ 64 <425000000>;
-                       opp-microvolt = <1150000>;
+                       opp-microvolt = <1100000>;
                };
                opp-510000000 {
                        opp-hz = /bits/ 64 <510000000>;
-                       opp-microvolt = <1150000>;
+                       opp-microvolt = <1100000>;
                };
                opp-637500000 {
                        opp-hz = /bits/ 64 <637500000>;
-                       opp-microvolt = <1150000>;
+                       opp-microvolt = <1100000>;
                        turbo-mode;
                };
        };
                        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
                        clock-names = "bus", "core";
                        operating-points-v2 = <&gpu_opp_table>;
-                       switch-delay = <0xffff>;
                };
        };
 }; /* end of / */
index fd4a3bf..1b442b1 100644 (file)
@@ -430,7 +430,7 @@ static void omap3_prm_reconfigure_io_chain(void)
  * registers, and omap3xxx_prm_reconfigure_io_chain() must be called.
  * No return value.
  */
-static void __init omap3xxx_prm_enable_io_wakeup(void)
+static void omap3xxx_prm_enable_io_wakeup(void)
 {
        if (prm_features & PRM_HAS_IO_WAKEUP)
                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
index b045812..bf7f845 100644 (file)
@@ -28,7 +28,7 @@
                        enable-method = "psci";
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
-                       cpu-idle-states = <&CPU_PH20>;
+                       cpu-idle-states = <&CPU_PW20>;
                };
 
                cpu1: cpu@1 {
@@ -38,7 +38,7 @@
                        enable-method = "psci";
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
-                       cpu-idle-states = <&CPU_PH20>;
+                       cpu-idle-states = <&CPU_PW20>;
                };
 
                l2: l2-cache {
                 */
                entry-method = "arm,psci";
 
-               CPU_PH20: cpu-ph20 {
-                       compatible = "arm,idle-state";
-                       idle-state-name = "PH20";
-                       arm,psci-suspend-param = <0x00010000>;
-                       entry-latency-us = <1000>;
-                       exit-latency-us = <1000>;
-                       min-residency-us = <3000>;
+               CPU_PW20: cpu-pw20 {
+                         compatible = "arm,idle-state";
+                         idle-state-name = "PW20";
+                         arm,psci-suspend-param = <0x0>;
+                         entry-latency-us = <2000>;
+                         exit-latency-us = <2000>;
+                         min-residency-us = <6000>;
                };
        };
 
index 4d58351..6bca5b0 100644 (file)
@@ -613,6 +613,7 @@ CONFIG_RTC_DRV_TEGRA=y
 CONFIG_RTC_DRV_IMX_SC=m
 CONFIG_RTC_DRV_XGENE=y
 CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
 CONFIG_DMA_BCM2835=m
 CONFIG_K3_DMA=y
 CONFIG_MV_XOR=y