ARM: s3c24xx: move spi fiq handler into platform
authorArnd Bergmann <arnd@arndb.de>
Tue, 3 Sep 2019 09:31:09 +0000 (11:31 +0200)
committerKrzysztof Kozlowski <krzk@kernel.org>
Wed, 19 Aug 2020 19:45:38 +0000 (21:45 +0200)
The fiq handler needs access to some register definitions that
should not be used directly by device drivers.

Since this is closely related to the irqchip driver anyway,
move it into the same place.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Add a header guard in include/linux/spi/s3c24xx-fiq.h, fix
       SPDX comment style, update maintainer's entry]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-23-krzk%40kernel.org
Acked-by: Mark Brown <broonie@kernel.org>
MAINTAINERS
arch/arm/mach-s3c24xx/Makefile
arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c [new file with mode: 0644]
arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S [new file with mode: 0644]
drivers/spi/Makefile
drivers/spi/spi-s3c24xx-fiq.S [deleted file]
drivers/spi/spi-s3c24xx-fiq.h [deleted file]
drivers/spi/spi-s3c24xx.c
include/linux/spi/s3c24xx-fiq.h [new file with mode: 0644]

index 45906c5..a141446 100644 (file)
@@ -15317,6 +15317,7 @@ S:      Maintained
 F:     Documentation/devicetree/bindings/spi/spi-samsung.txt
 F:     drivers/spi/spi-s3c*
 F:     include/linux/platform_data/spi-s3c64xx.h
+F:     include/linux/spi/s3c24xx-fiq.h
 
 SAMSUNG SXGBE DRIVERS
 M:     Byungho An <bh74.an@samsung.com>
index 3ad297b..b69eee2 100644 (file)
@@ -9,6 +9,8 @@
 
 obj-y                          += common.o
 obj-y                          += irq-s3c24xx.o
+obj-$(CONFIG_SPI_S3C24XX_FIQ)  += irq-s3c24xx-fiq.o
+obj-$(CONFIG_SPI_S3C24XX_FIQ)  += irq-s3c24xx-fiq-exports.o
 
 obj-$(CONFIG_CPU_S3C2410)      += s3c2410.o
 obj-$(CONFIG_S3C2410_PLL)      += pll-s3c2410.o
diff --git a/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c
new file mode 100644 (file)
index 0000000..84cf863
--- /dev/null
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <linux/stddef.h>
+#include <linux/export.h>
+#include <linux/spi/s3c24xx-fiq.h>
+
+EXPORT_SYMBOL(s3c24xx_spi_fiq_rx);
+EXPORT_SYMBOL(s3c24xx_spi_fiq_txrx);
+EXPORT_SYMBOL(s3c24xx_spi_fiq_tx);
diff --git a/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S
new file mode 100644 (file)
index 0000000..2a84535
--- /dev/null
@@ -0,0 +1,115 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* linux/drivers/spi/spi_s3c24xx_fiq.S
+ *
+ * Copyright 2009 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer code
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+#include <mach/map.h>
+#include <mach/regs-irq.h>
+
+#include <linux/spi/s3c24xx-fiq.h>
+
+#define S3C2410_SPTDAT           (0x10)
+#define S3C2410_SPRDAT           (0x14)
+
+       .text
+
+       @ entry to these routines is as follows, with the register names
+       @ defined in fiq.h so that they can be shared with the C files which
+       @ setup the calling registers.
+       @
+       @ fiq_rirq      The base of the IRQ registers to find S3C2410_SRCPND
+       @ fiq_rtmp      Temporary register to hold tx/rx data
+       @ fiq_rspi      The base of the SPI register block
+       @ fiq_rtx       The tx buffer pointer
+       @ fiq_rrx       The rx buffer pointer
+       @ fiq_rcount    The number of bytes to move
+
+       @ each entry starts with a word entry of how long it is
+       @ and an offset to the irq acknowledgment word
+
+ENTRY(s3c24xx_spi_fiq_rx)
+s3c24xx_spi_fix_rx:
+       .word   fiq_rx_end - fiq_rx_start
+       .word   fiq_rx_irq_ack - fiq_rx_start
+fiq_rx_start:
+       ldr     fiq_rtmp, fiq_rx_irq_ack
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+       strb    fiq_rtmp, [ fiq_rrx ], #1
+
+       mov     fiq_rtmp, #0xff
+       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+       subs    fiq_rcount, fiq_rcount, #1
+       subnes  pc, lr, #4              @@ return, still have work to do
+
+       @@ set IRQ controller so that next op will trigger IRQ
+       mov     fiq_rtmp, #0
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+       subs    pc, lr, #4
+
+fiq_rx_irq_ack:
+       .word   0
+fiq_rx_end:
+
+ENTRY(s3c24xx_spi_fiq_txrx)
+s3c24xx_spi_fiq_txrx:
+       .word   fiq_txrx_end - fiq_txrx_start
+       .word   fiq_txrx_irq_ack - fiq_txrx_start
+fiq_txrx_start:
+
+       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+       strb    fiq_rtmp, [ fiq_rrx ], #1
+
+       ldr     fiq_rtmp, fiq_txrx_irq_ack
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+       ldrb    fiq_rtmp, [ fiq_rtx ], #1
+       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+       subs    fiq_rcount, fiq_rcount, #1
+       subnes  pc, lr, #4              @@ return, still have work to do
+
+       mov     fiq_rtmp, #0
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+       subs    pc, lr, #4
+
+fiq_txrx_irq_ack:
+       .word   0
+
+fiq_txrx_end:
+
+ENTRY(s3c24xx_spi_fiq_tx)
+s3c24xx_spi_fix_tx:
+       .word   fiq_tx_end - fiq_tx_start
+       .word   fiq_tx_irq_ack - fiq_tx_start
+fiq_tx_start:
+       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+
+       ldr     fiq_rtmp, fiq_tx_irq_ack
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+       ldrb    fiq_rtmp, [ fiq_rtx ], #1
+       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+       subs    fiq_rcount, fiq_rcount, #1
+       subnes  pc, lr, #4              @@ return, still have work to do
+
+       mov     fiq_rtmp, #0
+       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+       subs    pc, lr, #4
+
+fiq_tx_irq_ack:
+       .word   0
+
+fiq_tx_end:
+
+       .end
index cf955ea..eba6fb6 100644 (file)
@@ -97,7 +97,6 @@ obj-$(CONFIG_SPI_RPCIF)                       += spi-rpc-if.o
 obj-$(CONFIG_SPI_RSPI)                 += spi-rspi.o
 obj-$(CONFIG_SPI_S3C24XX)              += spi-s3c24xx-hw.o
 spi-s3c24xx-hw-y                       := spi-s3c24xx.o
-spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
 obj-$(CONFIG_SPI_S3C64XX)              += spi-s3c64xx.o
 obj-$(CONFIG_SPI_SC18IS602)            += spi-sc18is602.o
 obj-$(CONFIG_SPI_SH)                   += spi-sh.o
diff --git a/drivers/spi/spi-s3c24xx-fiq.S b/drivers/spi/spi-s3c24xx-fiq.S
deleted file mode 100644 (file)
index 9d5f8f1..0000000
+++ /dev/null
@@ -1,115 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* linux/drivers/spi/spi_s3c24xx_fiq.S
- *
- * Copyright 2009 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX SPI - FIQ pseudo-DMA transfer code
-*/
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-#include <mach/map.h>
-#include <mach/regs-irq.h>
-
-#include "spi-s3c24xx-fiq.h"
-
-#define S3C2410_SPTDAT           (0x10)
-#define S3C2410_SPRDAT           (0x14)
-
-       .text
-
-       @ entry to these routines is as follows, with the register names
-       @ defined in fiq.h so that they can be shared with the C files which
-       @ setup the calling registers.
-       @
-       @ fiq_rirq      The base of the IRQ registers to find S3C2410_SRCPND
-       @ fiq_rtmp      Temporary register to hold tx/rx data
-       @ fiq_rspi      The base of the SPI register block
-       @ fiq_rtx       The tx buffer pointer
-       @ fiq_rrx       The rx buffer pointer
-       @ fiq_rcount    The number of bytes to move
-
-       @ each entry starts with a word entry of how long it is
-       @ and an offset to the irq acknowledgment word
-
-ENTRY(s3c24xx_spi_fiq_rx)
-s3c24xx_spi_fix_rx:
-       .word   fiq_rx_end - fiq_rx_start
-       .word   fiq_rx_irq_ack - fiq_rx_start
-fiq_rx_start:
-       ldr     fiq_rtmp, fiq_rx_irq_ack
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
-
-       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
-       strb    fiq_rtmp, [ fiq_rrx ], #1
-
-       mov     fiq_rtmp, #0xff
-       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
-
-       subs    fiq_rcount, fiq_rcount, #1
-       subnes  pc, lr, #4              @@ return, still have work to do
-
-       @@ set IRQ controller so that next op will trigger IRQ
-       mov     fiq_rtmp, #0
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
-       subs    pc, lr, #4
-
-fiq_rx_irq_ack:
-       .word   0
-fiq_rx_end:
-
-ENTRY(s3c24xx_spi_fiq_txrx)
-s3c24xx_spi_fiq_txrx:
-       .word   fiq_txrx_end - fiq_txrx_start
-       .word   fiq_txrx_irq_ack - fiq_txrx_start
-fiq_txrx_start:
-
-       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
-       strb    fiq_rtmp, [ fiq_rrx ], #1
-
-       ldr     fiq_rtmp, fiq_txrx_irq_ack
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
-
-       ldrb    fiq_rtmp, [ fiq_rtx ], #1
-       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
-
-       subs    fiq_rcount, fiq_rcount, #1
-       subnes  pc, lr, #4              @@ return, still have work to do
-
-       mov     fiq_rtmp, #0
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
-       subs    pc, lr, #4
-
-fiq_txrx_irq_ack:
-       .word   0
-
-fiq_txrx_end:
-
-ENTRY(s3c24xx_spi_fiq_tx)
-s3c24xx_spi_fix_tx:
-       .word   fiq_tx_end - fiq_tx_start
-       .word   fiq_tx_irq_ack - fiq_tx_start
-fiq_tx_start:
-       ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
-
-       ldr     fiq_rtmp, fiq_tx_irq_ack
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
-
-       ldrb    fiq_rtmp, [ fiq_rtx ], #1
-       strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
-
-       subs    fiq_rcount, fiq_rcount, #1
-       subnes  pc, lr, #4              @@ return, still have work to do
-
-       mov     fiq_rtmp, #0
-       str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
-       subs    pc, lr, #4
-
-fiq_tx_irq_ack:
-       .word   0
-
-fiq_tx_end:
-
-       .end
diff --git a/drivers/spi/spi-s3c24xx-fiq.h b/drivers/spi/spi-s3c24xx-fiq.h
deleted file mode 100644 (file)
index 7786b0e..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* linux/drivers/spi/spi_s3c24xx_fiq.h
- *
- * Copyright 2009 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX SPI - FIQ pseudo-DMA transfer support
-*/
-
-/* We have R8 through R13 to play with */
-
-#ifdef __ASSEMBLY__
-#define __REG_NR(x)     r##x
-#else
-#define __REG_NR(x)     (x)
-#endif
-
-#define fiq_rspi       __REG_NR(8)
-#define fiq_rtmp       __REG_NR(9)
-#define fiq_rrx                __REG_NR(10)
-#define fiq_rtx                __REG_NR(11)
-#define fiq_rcount     __REG_NR(12)
-#define fiq_rirq       __REG_NR(13)
index 0691248..6ac6f0b 100644 (file)
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
 #include <linux/spi/s3c24xx.h>
+#include <linux/spi/s3c24xx-fiq.h>
 #include <linux/module.h>
 
 #include <asm/fiq.h>
 
 #include "spi-s3c24xx-regs.h"
-#include "spi-s3c24xx-fiq.h"
 
 /**
  * s3c24xx_spi_devstate - per device data
@@ -229,10 +229,6 @@ struct spi_fiq_code {
        u8      data[];
 };
 
-extern struct spi_fiq_code s3c24xx_spi_fiq_txrx;
-extern struct spi_fiq_code s3c24xx_spi_fiq_tx;
-extern struct spi_fiq_code s3c24xx_spi_fiq_rx;
-
 /**
  * ack_bit - turn IRQ into IRQ acknowledgement bit
  * @irq: The interrupt number
@@ -282,7 +278,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
        regs.uregs[fiq_rrx]  = (long)hw->rx;
        regs.uregs[fiq_rtx]  = (long)hw->tx + 1;
        regs.uregs[fiq_rcount] = hw->len - 1;
-       regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ;
 
        set_fiq_regs(&regs);
 
diff --git a/include/linux/spi/s3c24xx-fiq.h b/include/linux/spi/s3c24xx-fiq.h
new file mode 100644 (file)
index 0000000..d2842ac
--- /dev/null
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* linux/drivers/spi/spi_s3c24xx_fiq.h
+ *
+ * Copyright 2009 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer support
+*/
+
+#ifndef __LINUX_SPI_S3C24XX_FIQ_H
+#define __LINUX_SPI_S3C24XX_FIQ_H __FILE__
+
+/* We have R8 through R13 to play with */
+
+#ifdef __ASSEMBLY__
+#define __REG_NR(x)     r##x
+#else
+
+extern struct spi_fiq_code s3c24xx_spi_fiq_txrx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_tx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_rx;
+
+#define __REG_NR(x)     (x)
+#endif
+
+#define fiq_rspi       __REG_NR(8)
+#define fiq_rtmp       __REG_NR(9)
+#define fiq_rrx                __REG_NR(10)
+#define fiq_rtx                __REG_NR(11)
+#define fiq_rcount     __REG_NR(12)
+#define fiq_rirq       __REG_NR(13)
+
+#endif /* __LINUX_SPI_S3C24XX_FIQ_H */