ARM: dts: Group omap3 CM_ICLKEN1_CORE clocks

The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.

With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi b/arch/arm/boot/dts/am35xx-clocks.dtsi
index 93a12dd..0ee7afa 100644 (file)
--- a/arch/arm/boot/dts/am35xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am35xx-clocks.dtsi
@@ -62,12 +62,27 @@
        };
 };
 &cm_clocks {
-       ipss_ick: ipss_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,am35xx-interface-clock";
-               clocks = <&core_l3_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <4>;
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               ipss_ick: clock-ipss-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,am35xx-interface-clock";
+                       clock-output-names = "ipss_ick";
+                       clocks = <&core_l3_ick>;
+                       ti,bit-shift = <4>;
+               };
+
+               uart4_ick_am35xx: clock-uart4-ick-am35xx {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "uart4_ick_am35xx";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <23>;
+               };
        };
 
        rmii_ck: rmii_ck {
@@ -82,14 +97,6 @@
                clock-frequency = <27000000>;
        };
 
-       uart4_ick_am35xx: uart4_ick_am35xx@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <23>;
-       };
-
        clock@a00 {
                compatible = "ti,clksel";
                reg = <0xa00>;

diff --git a/arch/arm/boot/dts/omap3430es1-clocks.dtsi b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
index 6509ae0..984e138 100644 (file)
--- a/arch/arm/boot/dts/omap3430es1-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
@@ -100,20 +100,43 @@
                clock-div = <2>;
        };
 
-       hsotgusb_ick_3430es1: hsotgusb_ick_3430es1@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-no-wait-interface-clock";
-               clocks = <&core_l3_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <4>;
-       };
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
 
-       fac_ick: fac_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <8>;
+               hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1 {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-no-wait-interface-clock";
+                       clock-output-names = "hsotgusb_ick_3430es1";
+                       clocks = <&core_l3_ick>;
+                       ti,bit-shift = <4>;
+               };
+
+               fac_ick: clock-fac-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "fac_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <8>;
+               };
+
+               ssi_ick: clock-ssi-ick-3430es1 {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-no-wait-interface-clock";
+                       clock-output-names = "ssi_ick_3430es1";
+                       clocks = <&ssi_l4_ick>;
+                       ti,bit-shift = <0>;
+               };
+
+               usb_l4_gate_ick: clock-usb-l4-gate-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,composite-interface-clock";
+                       clock-output-names = "usb_l4_gate_ick";
+                       clocks = <&l4_ick>;
+                       ti,bit-shift = <5>;
+               };
        };
 
        ssi_l4_ick: ssi_l4_ick {
@@ -124,22 +147,6 @@
                clock-div = <1>;
        };
 
-       ssi_ick: ssi_ick_3430es1@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-no-wait-interface-clock";
-               clocks = <&ssi_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <0>;
-       };
-
-       usb_l4_gate_ick: usb_l4_gate_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,composite-interface-clock";
-               clocks = <&l4_ick>;
-               ti,bit-shift = <5>;
-               reg = <0x0a10>;
-       };
-
        usb_l4_div_ick: usb_l4_div_ick@a40 {
                #clock-cells = <0>;
                compatible = "ti,composite-divider-clock";

diff --git a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
index 518eb7d..eca6b25 100644 (file)
--- a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
@@ -93,36 +93,51 @@
                clock-div = <1>;
        };
 
-       icr_ick: icr_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <29>;
-       };
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
 
-       des2_ick: des2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <26>;
-       };
+               icr_ick: clock-icr-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "icr_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <29>;
+               };
 
-       mspro_ick: mspro_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <23>;
-       };
+               des2_ick: clock-des2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "des2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <26>;
+               };
 
-       mailboxes_ick: mailboxes_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <7>;
+               mspro_ick: clock-mspro-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mspro_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <23>;
+               };
+
+               mailboxes_ick: clock-mailboxes-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mailboxes_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <7>;
+               };
+
+               sad2d_ick: clock-sad2d-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "sad2d_ick";
+                       clocks = <&l3_ick>;
+                       ti,bit-shift = <3>;
+               };
        };
 
        ssi_l4_ick: ssi_l4_ick {
@@ -216,14 +231,6 @@
                        ti,bit-shift = <23>;
                };
        };
-       sad2d_ick: sad2d_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&l3_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <3>;
-       };
-
        mad2d_ick: mad2d_ick@a18 {
                #clock-cells = <0>;
                compatible = "ti,omap3-interface-clock";

diff --git a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
index d698b05..f8583bb 100644 (file)
--- a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
@@ -141,12 +141,19 @@
                ti,bit-shift = <2>;
        };
 
-       mmchs3_ick: mmchs3_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <30>;
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               mmchs3_ick: clock-mmchs3-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mmchs3_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <30>;
+               };
        };
 
        clock@a00 {

diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
index 2472363..c74566f 100644 (file)
--- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
@@ -43,12 +43,27 @@
                clock-div = <2>;
        };
 
-       hsotgusb_ick_3430es2: hsotgusb_ick_3430es2@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-hsotgusb-interface-clock";
-               clocks = <&core_l3_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <4>;
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               hsotgusb_ick_3430es2: clock-hsotgusb-ick-3430es2 {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-hsotgusb-interface-clock";
+                       clock-output-names = "hsotgusb_ick_3430es2";
+                       clocks = <&core_l3_ick>;
+                       ti,bit-shift = <4>;
+               };
+
+               ssi_ick: clock-ssi-ick-3430es2 {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-ssi-interface-clock";
+                       clock-output-names = "ssi_ick_3430es2";
+                       clocks = <&ssi_l4_ick>;
+                       ti,bit-shift = <0>;
+               };
        };
 
        ssi_l4_ick: ssi_l4_ick {
@@ -59,14 +74,6 @@
                clock-div = <1>;
        };
 
-       ssi_ick: ssi_ick_3430es2@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-ssi-interface-clock";
-               clocks = <&ssi_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <0>;
-       };
-
        usim_gate_fck: usim_gate_fck@c00 {
                #clock-cells = <0>;
                compatible = "ti,composite-gate-clock";

diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 20b8559..60e6031 100644 (file)
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -799,164 +799,188 @@
                clock-div = <1>;
        };
 
-       sdrc_ick: sdrc_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,wait-gate-clock";
-               clocks = <&core_l3_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <1>;
-       };
+       /* CM_ICLKEN1_CORE */
+       clock@a10 {
+               compatible = "ti,clksel";
+               reg = <0xa10>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
 
-       gpmc_fck: gpmc_fck {
-               #clock-cells = <0>;
-               compatible = "fixed-factor-clock";
-               clocks = <&core_l3_ick>;
-               clock-mult = <1>;
-               clock-div = <1>;
-       };
+               sdrc_ick: clock-sdrc-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,wait-gate-clock";
+                       clock-output-names = "sdrc_ick";
+                       clocks = <&core_l3_ick>;
+                       ti,bit-shift = <1>;
+               };
 
-       core_l4_ick: core_l4_ick {
-               #clock-cells = <0>;
-               compatible = "fixed-factor-clock";
-               clocks = <&l4_ick>;
-               clock-mult = <1>;
-               clock-div = <1>;
-       };
+               mmchs2_ick: clock-mmchs2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mmchs2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <25>;
+               };
 
-       mmchs2_ick: mmchs2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <25>;
-       };
+               mmchs1_ick: clock-mmchs1-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mmchs1_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <24>;
+               };
 
-       mmchs1_ick: mmchs1_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <24>;
-       };
+               hdq_ick: clock-hdq-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "hdq_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <22>;
+               };
 
-       hdq_ick: hdq_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <22>;
-       };
+               mcspi4_ick: clock-mcspi4-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcspi4_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <21>;
+               };
 
-       mcspi4_ick: mcspi4_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <21>;
-       };
+               mcspi3_ick: clock-mcspi3-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcspi3_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <20>;
+               };
 
-       mcspi3_ick: mcspi3_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <20>;
-       };
+               mcspi2_ick: clock-mcspi2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcspi2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <19>;
+               };
 
-       mcspi2_ick: mcspi2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <19>;
-       };
+               mcspi1_ick: clock-mcspi1-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcspi1_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <18>;
+               };
 
-       mcspi1_ick: mcspi1_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <18>;
-       };
+               i2c3_ick: clock-i2c3-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "i2c3_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <17>;
+               };
 
-       i2c3_ick: i2c3_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <17>;
-       };
+               i2c2_ick: clock-i2c2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "i2c2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <16>;
+               };
 
-       i2c2_ick: i2c2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <16>;
-       };
+               i2c1_ick: clock-i2c1-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "i2c1_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <15>;
+               };
 
-       i2c1_ick: i2c1_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <15>;
-       };
+               uart2_ick: clock-uart2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "uart2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <14>;
+               };
 
-       uart2_ick: uart2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <14>;
-       };
+               uart1_ick: clock-uart1-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "uart1_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <13>;
+               };
 
-       uart1_ick: uart1_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <13>;
-       };
+               gpt11_ick: clock-gpt11-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "gpt11_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <12>;
+               };
 
-       gpt11_ick: gpt11_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <12>;
-       };
+               gpt10_ick: clock-gpt10-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "gpt10_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <11>;
+               };
 
-       gpt10_ick: gpt10_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <11>;
-       };
+               mcbsp5_ick: clock-mcbsp5-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcbsp5_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <10>;
+               };
 
-       mcbsp5_ick: mcbsp5_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <10>;
+               mcbsp1_ick: clock-mcbsp1-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "mcbsp1_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <9>;
+               };
+
+               omapctrl_ick: clock-omapctrl-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "omapctrl_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <6>;
+               };
+
+               aes2_ick: clock-aes2-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "aes2_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <28>;
+               };
+
+               sha12_ick: clock-sha12-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap3-interface-clock";
+                       clock-output-names = "sha12_ick";
+                       clocks = <&core_l4_ick>;
+                       ti,bit-shift = <27>;
+               };
        };
 
-       mcbsp1_ick: mcbsp1_ick@a10 {
+       gpmc_fck: gpmc_fck {
                #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <9>;
+               compatible = "fixed-factor-clock";
+               clocks = <&core_l3_ick>;
+               clock-mult = <1>;
+               clock-div = <1>;
        };
 
-       omapctrl_ick: omapctrl_ick@a10 {
+       core_l4_ick: core_l4_ick {
                #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <6>;
+               compatible = "fixed-factor-clock";
+               clocks = <&l4_ick>;
+               clock-mult = <1>;
+               clock-div = <1>;
        };
 
        dss_tv_fck: dss_tv_fck@e00 {
@@ -1010,14 +1034,6 @@
                clocks = <&gpt1_gate_fck>, <&gpt1_mux_fck>;
        };
 
-       aes2_ick: aes2_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               ti,bit-shift = <28>;
-               reg = <0x0a10>;
-       };
-
        wkup_32k_fck: wkup_32k_fck {
                #clock-cells = <0>;
                compatible = "fixed-factor-clock";
@@ -1034,14 +1050,6 @@
                ti,bit-shift = <3>;
        };
 
-       sha12_ick: sha12_ick@a10 {
-               #clock-cells = <0>;
-               compatible = "ti,omap3-interface-clock";
-               clocks = <&core_l4_ick>;
-               reg = <0x0a10>;
-               ti,bit-shift = <27>;
-       };
-
        wdt2_fck: wdt2_fck@c00 {
                #clock-cells = <0>;
                compatible = "ti,wait-gate-clock";