arm64: dts: mediatek: mt8516: add support for APDMA
authorFabien Parent <fparent@baylibre.com>
Wed, 9 Dec 2020 11:47:36 +0000 (12:47 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Sun, 31 Jan 2021 10:22:53 +0000 (11:22 +0100)
Add support the APDMA IP on MT8516. APDMA is a DMA controller
for UARTs.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201209114736.70625-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8516.dtsi

index e6e4d9d..b80e955 100644 (file)
                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
                };
 
+               apdma: dma-controller@11000480 {
+                       compatible = "mediatek,mt8516-uart-dma",
+                                    "mediatek,mt6577-uart-dma";
+                       reg = <0 0x11000480 0 0x80>,
+                             <0 0x11000500 0 0x80>,
+                             <0 0x11000580 0 0x80>,
+                             <0 0x11000600 0 0x80>,
+                             <0 0x11000980 0 0x80>,
+                             <0 0x11000a00 0 0x80>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_LOW>;
+                       dma-requests = <6>;
+                       clocks = <&topckgen CLK_TOP_APDMA>;
+                       clock-names = "apdma";
+                       #dma-cells = <1>;
+               };
+
                uart0: serial@11005000 {
                        compatible = "mediatek,mt8516-uart",
                                     "mediatek,mt6577-uart";
                        clocks = <&topckgen CLK_TOP_UART0_SEL>,
                                 <&topckgen CLK_TOP_UART0>;
                        clock-names = "baud", "bus";
+                       dmas = <&apdma 0
+                               &apdma 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
                        clocks = <&topckgen CLK_TOP_UART1_SEL>,
                                 <&topckgen CLK_TOP_UART1>;
                        clock-names = "baud", "bus";
+                       dmas = <&apdma 2
+                               &apdma 3>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
                        clocks = <&topckgen CLK_TOP_UART2_SEL>,
                                 <&topckgen CLK_TOP_UART2>;
                        clock-names = "baud", "bus";
+                       dmas = <&apdma 4
+                               &apdma 5>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };