RDMA/mlx5: Allow SQ modification
authorMaor Gottlieb <maorg@mellanox.com>
Thu, 16 Jul 2020 10:54:16 +0000 (13:54 +0300)
committerJason Gunthorpe <jgg@nvidia.com>
Fri, 24 Jul 2020 18:49:19 +0000 (15:49 -0300)
Currently the SQ is set to a ready state when the RAW QP is modified to
INIT.  When the TIS is modified, e.g. to change the lag_tx_affinity, then
SQs which are already in the ready state will not be affected.

Open a window to modify the SQ behavior by setting the SQ as ready only
when QP was modified to RTS.

Link: https://lore.kernel.org/r/20200716105416.1423826-1-leon@kernel.org
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Reviewed-by: Mark Zhang <markz@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/qp.c

index 88236f8..3da8af9 100644 (file)
@@ -3544,7 +3544,7 @@ static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
        switch (raw_qp_param->operation) {
        case MLX5_CMD_OP_RST2INIT_QP:
                rq_state = MLX5_RQC_STATE_RDY;
-               sq_state = MLX5_SQC_STATE_RDY;
+               sq_state = MLX5_SQC_STATE_RST;
                break;
        case MLX5_CMD_OP_2ERR_QP:
                rq_state = MLX5_RQC_STATE_ERR;
@@ -3556,13 +3556,11 @@ static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
                break;
        case MLX5_CMD_OP_RTR2RTS_QP:
        case MLX5_CMD_OP_RTS2RTS_QP:
-               if (raw_qp_param->set_mask ==
-                   MLX5_RAW_QP_RATE_LIMIT) {
-                       modify_rq = 0;
-                       sq_state = sq->state;
-               } else {
-                       return raw_qp_param->set_mask ? -EINVAL : 0;
-               }
+               if (raw_qp_param->set_mask & ~MLX5_RAW_QP_RATE_LIMIT)
+                       return -EINVAL;
+
+               modify_rq = 0;
+               sq_state = MLX5_SQC_STATE_RDY;
                break;
        case MLX5_CMD_OP_INIT2INIT_QP:
        case MLX5_CMD_OP_INIT2RTR_QP:
@@ -4443,7 +4441,7 @@ static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state,
                        [MLX5_SQ_STATE_NA]      = IB_QPS_RESET,
                },
                [MLX5_RQC_STATE_RDY] = {
-                       [MLX5_SQC_STATE_RST]    = MLX5_QP_STATE_BAD,
+                       [MLX5_SQC_STATE_RST]    = MLX5_QP_STATE,
                        [MLX5_SQC_STATE_RDY]    = MLX5_QP_STATE,
                        [MLX5_SQC_STATE_ERR]    = IB_QPS_SQE,
                        [MLX5_SQ_STATE_NA]      = MLX5_QP_STATE,
@@ -4455,7 +4453,7 @@ static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state,
                        [MLX5_SQ_STATE_NA]      = IB_QPS_ERR,
                },
                [MLX5_RQ_STATE_NA] = {
-                       [MLX5_SQC_STATE_RST]    = IB_QPS_RESET,
+                       [MLX5_SQC_STATE_RST]    = MLX5_QP_STATE,
                        [MLX5_SQC_STATE_RDY]    = MLX5_QP_STATE,
                        [MLX5_SQC_STATE_ERR]    = MLX5_QP_STATE,
                        [MLX5_SQ_STATE_NA]      = MLX5_QP_STATE_BAD,