MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.

Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi,
jz4780.dtsi, x1000.dtsi, and x1830.dtsi files.

Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
index a8fca56..a1f0b71 100644 (file)
--- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi
@@ -7,6 +7,20 @@
        #size-cells = <1>;
        compatible = "ingenic,jz4725b";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-mxu1.0";
+                       reg = <0>;
+
+                       clocks = <&cgu JZ4725B_CLK_CCLK>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;

diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 1520585..eee5236 100644 (file)
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -7,6 +7,20 @@
        #size-cells = <1>;
        compatible = "ingenic,jz4740";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-mxu1.0";
+                       reg = <0>;
+
+                       clocks = <&cgu JZ4740_CLK_CCLK>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;

diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi
index fa11ac9..018721a 100644 (file)
--- a/arch/mips/boot/dts/ingenic/jz4770.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0
-
 #include <dt-bindings/clock/jz4770-cgu.h>
 #include <dt-bindings/clock/ingenic,tcu.h>
 
@@ -8,6 +7,20 @@
        #size-cells = <1>;
        compatible = "ingenic,jz4770";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+                       reg = <0>;
+
+                       clocks = <&cgu JZ4770_CLK_CCLK>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b7f409a..dfb5a7e 100644 (file)
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -8,6 +8,29 @@
        #size-cells = <1>;
        compatible = "ingenic,jz4780";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+                       reg = <0>;
+
+                       clocks = <&cgu JZ4780_CLK_CPU>;
+                       clock-names = "cpu";
+               };
+
+               cpu1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+                       reg = <1>;
+
+                       clocks = <&cgu JZ4780_CLK_CORE1>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;

diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
index 9de9e7c..1f1f896 100644 (file)
--- a/arch/mips/boot/dts/ingenic/x1000.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1000.dtsi
@@ -8,6 +8,20 @@
        #size-cells = <1>;
        compatible = "ingenic,x1000", "ingenic,x1000e";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+                       reg = <0>;
+
+                       clocks = <&cgu X1000_CLK_CPU>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;

diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi
index eb12144..b05dac3 100644 (file)
--- a/arch/mips/boot/dts/ingenic/x1830.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
@@ -8,6 +8,20 @@
        #size-cells = <1>;
        compatible = "ingenic,x1830";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "ingenic,xburst-fpu2.0-mxu2.0";
+                       reg = <0>;
+
+                       clocks = <&cgu X1830_CLK_CPU>;
+                       clock-names = "cpu";
+               };
+       };
+
        cpuintc: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;