powerpc/64s/pseries: Fix hash tlbiel_all_isa300 for guest kernels

tlbiel_all() can not be usable in !HVMODE when running hash presently,
remove HV privileged flushes when running in guest to make it usable.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201126102530.691335-3-npiggin@gmail.com

diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/book3s64/hash_native.c
index 97fa42d..52e170b 100644 (file)
--- a/arch/powerpc/mm/book3s64/hash_native.c
+++ b/arch/powerpc/mm/book3s64/hash_native.c
@@ -92,16 +92,15 @@ static void tlbiel_all_isa300(unsigned int num_sets, unsigned int is)
        asm volatile("ptesync": : :"memory");
 
        /*
-        * Flush the first set of the TLB, and any caching of partition table
-        * entries. Then flush the remaining sets of the TLB. Hash mode uses
-        * partition scoped TLB translations.
+        * Flush the partition table cache if this is HV mode.
         */
-       tlbiel_hash_set_isa300(0, is, 0, 2, 0);
-       for (set = 1; set < num_sets; set++)
-               tlbiel_hash_set_isa300(set, is, 0, 0, 0);
+       if (early_cpu_has_feature(CPU_FTR_HVMODE))
+               tlbiel_hash_set_isa300(0, is, 0, 2, 0);
 
        /*
-        * Now invalidate the process table cache.
+        * Now invalidate the process table cache. UPRT=0 HPT modes (what
+        * current hardware implements) do not use the process table, but
+        * add the flushes anyway.
         *
         * From ISA v3.0B p. 1078:
         *     The following forms are invalid.
@@ -110,6 +109,14 @@ static void tlbiel_all_isa300(unsigned int num_sets, unsigned int is)
         */
        tlbiel_hash_set_isa300(0, is, 0, 2, 1);
 
+       /*
+        * Then flush the sets of the TLB proper. Hash mode uses
+        * partition scoped TLB translations, which may be flushed
+        * in !HV mode.
+        */
+       for (set = 0; set < num_sets; set++)
+               tlbiel_hash_set_isa300(set, is, 0, 0, 0);
+
        ppc_after_tlbiel_barrier();
 
        asm volatile(PPC_ISA_3_0_INVALIDATE_ERAT "; isync" : : :"memory");