drm/etnaviv: request pages from DMA32 zone when needed

Some Vivante GPUs are found in systems that have interconnects restricted
to 32 address bits, but may have system memory mapped above the 4GB mark.
As this region isn't accessible to the GPU via DMA any GPU memory allocated
in the upper part needs to go through SWIOTLB bounce buffering. This kills
performance if it happens too often, as well as overrunning the available
bounce buffer space, as the GPU buffer may stay mapped for a long time.

Avoid bounce buffering by checking the addressing restrictions. If the
GPU is unable to access memory above the 4GB mark, request our SHM buffers
to be located in the DMA32 zone.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index 6b43c1c..a8685b2 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
@@ -551,6 +551,7 @@ static int etnaviv_bind(struct device *dev)
        mutex_init(&priv->gem_lock);
        INIT_LIST_HEAD(&priv->gem_list);
        priv->num_gpus = 0;
+       priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
 
        priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev);
        if (IS_ERR(priv->cmdbuf_suballoc)) {

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
index efc656e..4d8dc92 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
@@ -35,6 +35,7 @@ struct etnaviv_drm_private {
        int num_gpus;
        struct device_dma_parameters dma_parms;
        struct etnaviv_gpu *gpu[ETNA_MAX_PIPES];
+       gfp_t shm_gfp_mask;
 
        struct etnaviv_cmdbuf_suballoc *cmdbuf_suballoc;
        struct etnaviv_iommu_global *mmu_global;

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
index 6adea18..dc9ef30 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
@@ -602,6 +602,7 @@ static int etnaviv_gem_new_impl(struct drm_device *dev, u32 size, u32 flags,
 int etnaviv_gem_new_handle(struct drm_device *dev, struct drm_file *file,
        u32 size, u32 flags, u32 *handle)
 {
+       struct etnaviv_drm_private *priv = dev->dev_private;
        struct drm_gem_object *obj = NULL;
        int ret;
 
@@ -624,8 +625,7 @@ int etnaviv_gem_new_handle(struct drm_device *dev, struct drm_file *file,
         * above new_inode() why this is required _and_ expected if you're
         * going to pin these pages.
         */
-       mapping_set_gfp_mask(obj->filp->f_mapping, GFP_HIGHUSER |
-                            __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
+       mapping_set_gfp_mask(obj->filp->f_mapping, priv->shm_gfp_mask);
 
        etnaviv_gem_obj_add(dev, obj);
 

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 169db7c..a31eeff 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -781,6 +781,14 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
                gpu->identity.features &= ~chipFeatures_FAST_CLEAR;
        }
 
+       /*
+        * If the GPU is part of a system with DMA addressing limitations,
+        * request pages for our SHM backend buffers from the DMA32 zone to
+        * hopefully avoid performance killing SWIOTLB bounce buffering.
+        */
+       if (dma_addressing_limited(gpu->dev))
+               priv->shm_gfp_mask |= GFP_DMA32;
+
        /* Create buffer: */
        ret = etnaviv_cmdbuf_init(priv->cmdbuf_suballoc, &gpu->buffer,
                                  PAGE_SIZE);