arm64: dts: qcom: sm8250: add mi2s pinconfs
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Wed, 2 Dec 2020 18:07:40 +0000 (18:07 +0000)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 28 Dec 2020 18:14:24 +0000 (12:14 -0600)
Add primary and tertinary mi2s pinconfs required to get I2S audio.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-6-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8250.dtsi

index ad0a0a8..ed53862 100644 (file)
                        gpio-ranges = <&tlmm 0 0 180>;
                        wakeup-parent = <&pdc>;
 
+                       pri_mi2s_active: pri-mi2s-active {
+                               sclk {
+                                       pins = "gpio138";
+                                       function = "mi2s0_sck";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               ws {
+                                       pins = "gpio141";
+                                       function = "mi2s0_ws";
+                                       drive-strength = <8>;
+                                       output-high;
+                               };
+
+                               data0 {
+                                       pins = "gpio139";
+                                       function = "mi2s0_data0";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                                       output-high;
+                               };
+
+                               data1 {
+                                       pins = "gpio140";
+                                       function = "mi2s0_data1";
+                                       drive-strength = <8>;
+                                       output-high;
+                               };
+                       };
+
                        qup_i2c0_default: qup-i2c0-default {
                                mux {
                                        pins = "gpio28", "gpio29";
                                        function = "qup18";
                                };
                        };
+
+                       tert_mi2s_active: tert-mi2s-active {
+                               sck {
+                                       pins = "gpio133";
+                                       function = "mi2s2_sck";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               data0 {
+                                       pins = "gpio134";
+                                       function = "mi2s2_data0";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                                       output-high;
+                               };
+
+                               ws {
+                                       pins = "gpio135";
+                                       function = "mi2s2_ws";
+                                       drive-strength = <8>;
+                                       output-high;
+                               };
+                       };
                };
 
                apps_smmu: iommu@15000000 {