goto err_init;
bridge->ops = &cdns_pcie_host_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
ret = pci_host_probe(bridge);
if (ret < 0)
bridge->sysdata = pp;
bridge->ops = &dw_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret)
/* Initialize bridge */
bridge->sysdata = pcie;
bridge->ops = &mobiveil_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
ret = mobiveil_bringup_link(pcie);
if (ret) {
bridge->sysdata = pcie;
bridge->ops = &advk_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
ret = pci_host_probe(bridge);
if (ret < 0) {
return -ENOMEM;
host->ops = &faraday_pci_ops;
- host->map_irq = of_irq_parse_and_map_pci;
- host->swizzle_irq = pci_common_swizzle;
p = pci_host_bridge_priv(host);
host->sysdata = p;
p->dev = dev;
bridge->sysdata = cfg;
bridge->ops = (struct pci_ops *)&ops->pci_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
platform_set_drvdata(pdev, bridge);
bridge->sysdata = pcie;
bridge->ops = &mvebu_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
bridge->align_resource = mvebu_pcie_align_resource;
bridge->msi = pcie->msi;
host->ops = &tegra_pcie_ops;
host->map_irq = tegra_pcie_map_irq;
- host->swizzle_irq = pci_common_swizzle;
err = pci_host_probe(host);
if (err < 0) {
return -ENOMEM;
host->ops = &v3_pci_ops;
- host->map_irq = of_irq_parse_and_map_pci;
- host->swizzle_irq = pci_common_swizzle;
v3 = pci_host_bridge_priv(host);
host->sysdata = v3;
v3->dev = dev;
pci_add_flags(PCI_REASSIGN_ALL_BUS);
bridge->ops = &pci_versatile_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
return pci_host_probe(bridge);
}
bridge->sysdata = port;
bridge->ops = &xgene_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
return pci_host_probe(bridge);
}
bridge->sysdata = pcie;
bridge->busnr = pcie->root_bus_nr;
bridge->ops = &altera_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
return pci_host_probe(bridge);
}
bridge->ops = &brcm_pcie_ops;
bridge->sysdata = pcie;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
platform_set_drvdata(pdev, pcie);
switch (pcie->type) {
case IPROC_PCIE_PAXC:
case IPROC_PCIE_PAXC_V2:
+ pcie->map_irq = 0;
break;
default:
- pcie->map_irq = of_irq_parse_and_map_pci;
+ break;
}
ret = iproc_pcie_setup(pcie, &bridge->windows);
host->ops = &iproc_pcie_ops;
host->sysdata = pcie;
host->map_irq = pcie->map_irq;
- host->swizzle_irq = pci_common_swizzle;
ret = pci_host_probe(host);
if (ret < 0) {
return err;
host->ops = pcie->soc->ops;
- host->map_irq = of_irq_parse_and_map_pci;
- host->swizzle_irq = pci_common_swizzle;
host->sysdata = pcie;
err = pci_host_probe(host);
bridge->sysdata = host;
bridge->ops = &rcar_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
if (IS_ENABLED(CONFIG_PCI_MSI))
bridge->msi = &host->msi.chip;
bridge->sysdata = rockchip;
bridge->ops = &rockchip_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
err = pci_host_probe(bridge);
if (err < 0)
bridge->sysdata = pcie;
bridge->ops = &nwl_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
if (IS_ENABLED(CONFIG_PCI_MSI)) {
err = nwl_pcie_enable_msi(pcie);
bridge->sysdata = port;
bridge->ops = &xilinx_pcie_ops;
- bridge->map_irq = of_irq_parse_and_map_pci;
- bridge->swizzle_irq = pci_common_swizzle;
#ifdef CONFIG_PCI_MSI
xilinx_pcie_msi_chip.dev = dev;
if (!dev->of_node)
return 0;
+ bridge->swizzle_irq = pci_common_swizzle;
+ bridge->map_irq = of_irq_parse_and_map_pci;
+
return pci_parse_request_of_pci_ranges(dev, bridge);
}