powerpc/fsl_booke/32: CacheLockingException remove args

Like other interrupt handler conversions, switch to getting registers
from the pt_regs argument.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210130130852.2952424-8-npiggin@gmail.com

diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index fdd4d27..3f4a40c 100644 (file)
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -364,12 +364,12 @@ interrupt_base:
        /* Data Storage Interrupt */
        START_EXCEPTION(DataStorage)
        NORMAL_EXCEPTION_PROLOG(DATA_STORAGE)
-       mfspr   r5,SPRN_ESR             /* Grab the ESR, save it, pass arg3 */
+       mfspr   r5,SPRN_ESR             /* Grab the ESR, save it */
        stw     r5,_ESR(r11)
-       mfspr   r4,SPRN_DEAR            /* Grab the DEAR, save it, pass arg2 */
+       mfspr   r4,SPRN_DEAR            /* Grab the DEAR, save it */
+       stw     r4, _DEAR(r11)
        andis.  r10,r5,(ESR_ILK|ESR_DLK)@h
        bne     1f
-       stw     r4, _DEAR(r11)
        EXC_XFER_LITE(0x0300, handle_page_fault)
 1:
        addi    r3,r1,STACK_FRAME_OVERHEAD

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 3ec7b44..1c77b1a 100644 (file)
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -2062,9 +2062,10 @@ void altivec_assist_exception(struct pt_regs *regs)
 #endif /* CONFIG_ALTIVEC */
 
 #ifdef CONFIG_FSL_BOOKE
-void CacheLockingException(struct pt_regs *regs, unsigned long address,
-                          unsigned long error_code)
+void CacheLockingException(struct pt_regs *regs)
 {
+       unsigned long error_code = regs->dsisr;
+
        /* We treat cache locking instructions from the user
         * as priv ops, in the future we could try to do
         * something smarter