Merge tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips...

Pull MIPS fixes from Thomas Bogendoerfer:

 - fixed FP register access on Loongsoon-3

 - added missing 1074 cpu handling

 - fixed Loongson2ef build error

* tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: BCM47XX: Remove the needless check with the 1074K
  MIPS: Add the missing 'CPU_1074K' into __get_cpu_type()
  MIPS: Loongson2ef: Disable Loongson MMI instructions
  MIPS: Loongson-3: Fix fp register access if MSA enabled

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 82627c2..01427bd 100644 (file)
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -148,7 +148,7 @@ void __init plat_mem_setup(void)
 {
        struct cpuinfo_mips *c = &current_cpu_data;
 
-       if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) {
+       if (c->cputype == CPU_74K) {
                pr_info("Using bcma bus\n");
 #ifdef CONFIG_BCM47XX_BCMA
                bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 75a7a38..3288cef 100644 (file)
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -47,6 +47,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_34K:
        case CPU_1004K:
        case CPU_74K:
+       case CPU_1074K:
        case CPU_M14KC:
        case CPU_M14KEC:
        case CPU_INTERAPTIV:

diff --git a/arch/mips/loongson2ef/Platform b/arch/mips/loongson2ef/Platform
index 4ab55f1..ae023b9 100644 (file)
--- a/arch/mips/loongson2ef/Platform
+++ b/arch/mips/loongson2ef/Platform
@@ -44,6 +44,10 @@ ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
   endif
 endif
 
+# Some -march= flags enable MMI instructions, and GCC complains about that
+# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
+cflags-y += $(call cc-option,-mno-loongson-mmi)
+
 #
 # Loongson Machines' Support
 #

diff --git a/arch/mips/loongson64/cop2-ex.c b/arch/mips/loongson64/cop2-ex.c
index f130f62..00055d4 100644 (file)
--- a/arch/mips/loongson64/cop2-ex.c
+++ b/arch/mips/loongson64/cop2-ex.c
@@ -95,10 +95,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                        if (res)
                                goto fault;
 
-                       set_fpr64(current->thread.fpu.fpr,
-                               insn.loongson3_lswc2_format.rt, value);
-                       set_fpr64(current->thread.fpu.fpr,
-                               insn.loongson3_lswc2_format.rq, value_next);
+                       set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value);
+                       set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next);
                        compute_return_epc(regs);
                        own_fpu(1);
                }
@@ -130,15 +128,13 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                                goto sigbus;
 
                        lose_fpu(1);
-                       value_next = get_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lswc2_format.rq);
+                       value_next = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0);
 
                        StoreDW(addr + 8, value_next, res);
                        if (res)
                                goto fault;
 
-                       value = get_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lswc2_format.rt);
+                       value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0);
 
                        StoreDW(addr, value, res);
                        if (res)
@@ -204,8 +200,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                        if (res)
                                goto fault;
 
-                       set_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lsdc2_format.rt, value);
+                       set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
                        compute_return_epc(regs);
                        own_fpu(1);
 
@@ -221,8 +216,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                        if (res)
                                goto fault;
 
-                       set_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lsdc2_format.rt, value);
+                       set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
                        compute_return_epc(regs);
                        own_fpu(1);
                        break;
@@ -286,8 +280,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                                goto sigbus;
 
                        lose_fpu(1);
-                       value = get_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lsdc2_format.rt);
+                       value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
 
                        StoreW(addr, value, res);
                        if (res)
@@ -305,8 +298,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                                goto sigbus;
 
                        lose_fpu(1);
-                       value = get_fpr64(current->thread.fpu.fpr,
-                                       insn.loongson3_lsdc2_format.rt);
+                       value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
 
                        StoreDW(addr, value, res);
                        if (res)