arm64: dts: qcom: msm8998: Add ADSP, MPSS and SLPI nodes

This patch adds ADSP, MPSS and SLPI nodes for MSM8998 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218132217.28141-6-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
index 6835fbd..09e765d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
@@ -311,6 +311,14 @@
        };
 };
 
+&remoteproc_adsp {
+       status = "okay";
+};
+
+&remoteproc_slpi {
+       status = "okay";
+};
+
 &tlmm {
        gpio-reserved-ranges = <0 4>, <81 4>;
 };

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 29183cd..93e69f8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1073,6 +1073,61 @@
                        #interrupt-cells = <0x2>;
                };
 
+               remoteproc_mss: remoteproc@4080000 {
+                       compatible = "qcom,msm8998-mss-pil";
+                       reg = <0x04080000 0x100>, <0x04180000 0x20>;
+                       reg-names = "qdsp6", "rmb";
+
+                       interrupts-extended =
+                               <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+                               <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                               <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                               <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                               <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+                               <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack",
+                                         "shutdown-ack";
+
+                       clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+                                <&gcc GCC_BIMC_MSS_Q6_AXI_CLK>,
+                                <&gcc GCC_BOOT_ROM_AHB_CLK>,
+                                <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+                                <&gcc GCC_MSS_SNOC_AXI_CLK>,
+                                <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
+                                <&rpmcc RPM_SMD_QDSS_CLK>,
+                                <&rpmcc RPM_SMD_XO_CLK_SRC>;
+                       clock-names = "iface", "bus", "mem", "gpll0_mss",
+                                     "snoc_axi", "mnoc_axi", "qdss", "xo";
+
+                       qcom,smem-states = <&modem_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       resets = <&gcc GCC_MSS_RESTART>;
+                       reset-names = "mss_restart";
+
+                       qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
+
+                       power-domains = <&rpmpd MSM8998_VDDCX>,
+                                       <&rpmpd MSM8998_VDDMX>;
+                       power-domain-names = "cx", "mx";
+
+                       mba {
+                               memory-region = <&mba_mem>;
+                       };
+
+                       mpss {
+                               memory-region = <&mpss_mem>;
+                       };
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>;
+                               label = "modem";
+                               qcom,remote-pid = <1>;
+                               mboxes = <&apcs_glb 15>;
+                       };
+               };
+
                gpucc: clock-controller@5065000 {
                        compatible = "qcom,msm8998-gpucc";
                        #clock-cells = <1>;
@@ -1086,6 +1141,42 @@
                                      "gpll0";
                };
 
+               remoteproc_slpi: remoteproc@5800000 {
+                       compatible = "qcom,msm8998-slpi-pas";
+                       reg = <0x05800000 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 390 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       px-supply = <&vreg_lvs2a_1p8>;
+
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+                                <&rpmcc RPM_SMD_AGGR2_NOC_CLK>;
+                       clock-names = "xo", "aggre2";
+
+                       memory-region = <&slpi_mem>;
+
+                       qcom,smem-states = <&slpi_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       power-domains = <&rpmpd MSM8998_SSCCX>;
+                       power-domain-names = "ssc_cx";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
+                               label = "dsps";
+                               qcom,remote-pid = <3>;
+                               mboxes = <&apcs_glb 27>;
+                       };
+               };
+
                stm: stm@6002000 {
                        compatible = "arm,coresight-stm", "arm,primecell";
                        reg = <0x06002000 0x1000>,
@@ -1878,6 +1969,39 @@
                        #size-cells = <0>;
                };
 
+               remoteproc_adsp: remoteproc@17300000 {
+                       compatible = "qcom,msm8998-adsp-pas";
+                       reg = <0x17300000 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+                       clock-names = "xo";
+
+                       memory-region = <&adsp_mem>;
+
+                       qcom,smem-states = <&adsp_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       power-domains = <&rpmpd MSM8998_VDDCX>;
+                       power-domain-names = "cx";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
+                               label = "lpass";
+                               qcom,remote-pid = <2>;
+                               mboxes = <&apcs_glb 9>;
+                       };
+               };
+
                apcs_glb: mailbox@17911000 {
                        compatible = "qcom,msm8998-apcs-hmss-global";
                        reg = <0x17911000 0x1000>;