riscv: Correct SPARSEMEM configuration
authorKefeng Wang <wangkefeng.wang@huawei.com>
Mon, 15 Mar 2021 12:03:07 +0000 (20:03 +0800)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Wed, 17 Mar 2021 05:15:21 +0000 (22:15 -0700)
There are two issues for RV32,
1) if use FLATMEM, it is useless to enable SPARSEMEM_STATIC.
2) if use SPARSMEM, both SPARSEMEM_VMEMMAP and SPARSEMEM_STATIC is enabled.

Fixes: d95f1a542c3d ("RISC-V: Implement sparsemem")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/Kconfig

index 85d626b..87d7b52 100644 (file)
@@ -93,7 +93,6 @@ config RISCV
        select PCI_MSI if PCI
        select RISCV_INTC
        select RISCV_TIMER if RISCV_SBI
-       select SPARSEMEM_STATIC if 32BIT
        select SPARSE_IRQ
        select SYSCTL_EXCEPTION_TRACE
        select THREAD_INFO_IN_TASK
@@ -154,7 +153,8 @@ config ARCH_FLATMEM_ENABLE
 config ARCH_SPARSEMEM_ENABLE
        def_bool y
        depends on MMU
-       select SPARSEMEM_VMEMMAP_ENABLE
+       select SPARSEMEM_STATIC if 32BIT && SPARSMEM
+       select SPARSEMEM_VMEMMAP_ENABLE if 64BIT
 
 config ARCH_SELECT_MEMORY_MODEL
        def_bool ARCH_SPARSEMEM_ENABLE