clk: renesas: r8a7796: Add TMU clocks
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Wed, 9 Dec 2020 19:53:40 +0000 (20:53 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 28 Dec 2020 09:45:16 +0000 (10:45 +0100)
This patch adds TMU{0,1,2,3,4} clocks.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20201209195343.803120-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c

index 2cd6e38..41593c1 100644 (file)
@@ -128,6 +128,11 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 
 static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
        DEF_MOD("fdp1-0",                119,   R8A7796_CLK_S0D1),
+       DEF_MOD("tmu4",                  121,   R8A7796_CLK_S0D6),
+       DEF_MOD("tmu3",                  122,   R8A7796_CLK_S3D2),
+       DEF_MOD("tmu2",                  123,   R8A7796_CLK_S3D2),
+       DEF_MOD("tmu1",                  124,   R8A7796_CLK_S3D2),
+       DEF_MOD("tmu0",                  125,   R8A7796_CLK_CP),
        DEF_MOD("scif5",                 202,   R8A7796_CLK_S3D4),
        DEF_MOD("scif4",                 203,   R8A7796_CLK_S3D4),
        DEF_MOD("scif3",                 204,   R8A7796_CLK_S3D4),