drm/i915/rkl: Use revid->stepping tables
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 13 Jul 2021 19:36:32 +0000 (12:36 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Thu, 15 Jul 2021 00:47:11 +0000 (17:47 -0700)
Switch RKL to use a revid->stepping table as we're trying to do on all
platforms going forward.

Bspec: 44501
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210713193635.3390052-10-matthew.d.roper@intel.com
drivers/gpu/drm/i915/display/intel_psr.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_step.c

index 77865cf..4318999 100644 (file)
@@ -550,7 +550,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
        if (intel_dp->psr.psr2_sel_fetch_enabled) {
                /* WA 1408330847 */
                if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
-                   IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0))
+                   IS_RKL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
                        intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
                                     DIS_RAM_BYPASS_PSR2_MAN_TRACK,
                                     DIS_RAM_BYPASS_PSR2_MAN_TRACK);
@@ -1221,7 +1221,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
        /* WA 1408330847 */
        if (intel_dp->psr.psr2_sel_fetch_enabled &&
            (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
-            IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0)))
+            IS_RKL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0)))
                intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
                             DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
 
index 45c2f26..bc6a896 100644 (file)
@@ -1490,12 +1490,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
        (IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
         IS_GT_STEP(__i915, since, until))
 
-#define RKL_REVID_A0           0x0
-#define RKL_REVID_B0           0x1
-#define RKL_REVID_C0           0x4
-
-#define IS_RKL_REVID(p, since, until) \
-       (IS_ROCKETLAKE(p) && IS_REVID(p, since, until))
+#define IS_RKL_DISPLAY_STEP(p, since, until) \
+       (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))
 
 #define DG1_REVID_A0           0x0
 #define DG1_REVID_B0           0x1
index 9de17bd..93edfbe 100644 (file)
@@ -75,6 +75,12 @@ static const struct intel_step_info tgl_revids[] = {
        [1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
 };
 
+static const struct intel_step_info rkl_revids[] = {
+       [0] = { COMMON_STEP(A0) },
+       [1] = { COMMON_STEP(B0) },
+       [4] = { COMMON_STEP(C0) },
+};
+
 static const struct intel_step_info adls_revids[] = {
        [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
        [0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
@@ -103,6 +109,9 @@ void intel_step_init(struct drm_i915_private *i915)
        } else if (IS_ALDERLAKE_S(i915)) {
                revids = adls_revids;
                size = ARRAY_SIZE(adls_revids);
+       } else if (IS_ROCKETLAKE(i915)) {
+               revids = rkl_revids;
+               size = ARRAY_SIZE(rkl_revids);
        } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
                revids = tgl_uy_revids;
                size = ARRAY_SIZE(tgl_uy_revids);