Merge tag 'x86-asm-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 asm updates from Ingo Molnar:

 - Micro-optimize and standardize the do_syscall_64() calling convention

 - Make syscall entry flags clearing more conservative

 - Clean up syscall table handling

 - Clean up & standardize assembly macros, in preparation of FRED

 - Misc cleanups and fixes

* tag 'x86-asm-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/asm: Make <asm/asm.h> valid on cross-builds as well
  x86/regs: Syscall_get_nr() returns -1 for a non-system call
  x86/entry: Split PUSH_AND_CLEAR_REGS into two submacros
  x86/syscall: Maximize MSR_SYSCALL_MASK
  x86/syscall: Unconditionally prototype {ia32,x32}_sys_call_table[]
  x86/entry: Reverse arguments to do_syscall_64()
  x86/entry: Unify definitions from <asm/calling.h> and <asm/ptrace-abi.h>
  x86/asm: Use _ASM_BYTES() in <asm/nops.h>
  x86/asm: Add _ASM_BYTES() macro for a .byte ... opcode sequence
  x86/asm: Have the __ASM_FORM macros handle commas in arguments

diff --combined arch/x86/entry/common.c
index 04bce95,00da0f5..f796886
--- 1/arch/x86/entry/common.c
--- 2/arch/x86/entry/common.c
+++ b/arch/x86/entry/common.c
@@@ -36,7 -36,7 +36,7 @@@
  #include <asm/irq_stack.h>
  
  #ifdef CONFIG_X86_64
- __visible noinstr void do_syscall_64(unsigned long nr, struct pt_regs *regs)
+ __visible noinstr void do_syscall_64(struct pt_regs *regs, unsigned long nr)
  {
        add_random_kstack_offset();
        nr = syscall_enter_from_user_mode(regs, nr);
@@@ -130,8 -130,8 +130,8 @@@ static noinstr bool __do_fast_syscall_3
                /* User code screwed up. */
                regs->ax = -EFAULT;
  
 -              instrumentation_end();
                local_irq_disable();
 +              instrumentation_end();
                irqentry_exit_to_user_mode(regs);
                return false;
        }
@@@ -269,16 -269,15 +269,16 @@@ __visible noinstr void xen_pv_evtchn_do
        irqentry_state_t state = irqentry_enter(regs);
        bool inhcall;
  
 +      instrumentation_begin();
        run_sysvec_on_irqstack_cond(__xen_pv_evtchn_do_upcall, regs);
  
        inhcall = get_and_clear_inhcall();
        if (inhcall && !WARN_ON_ONCE(state.exit_rcu)) {
 -              instrumentation_begin();
                irqentry_exit_cond_resched();
                instrumentation_end();
                restore_inhcall(inhcall);
        } else {
 +              instrumentation_end();
                irqentry_exit(regs, state);
        }
  }

diff --combined arch/x86/entry/entry_64.S
index 1886aaf,1d9db15..237da6c
--- 1/arch/x86/entry/entry_64.S
--- 2/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@@ -107,8 -107,8 +107,8 @@@ SYM_INNER_LABEL(entry_SYSCALL_64_after_
        PUSH_AND_CLEAR_REGS rax=$-ENOSYS
  
        /* IRQs are off. */
-       movq    %rax, %rdi
-       movq    %rsp, %rsi
+       movq    %rsp, %rdi
+       movq    %rax, %rsi
        call    do_syscall_64           /* returns with IRQs disabled */
  
        /*
@@@ -506,7 -506,7 +506,7 @@@ SYM_CODE_START(\asmsym
  
        movq    %rsp, %rdi              /* pt_regs pointer */
  
 -      call    \cfunc
 +      call    kernel_\cfunc
  
        /*
         * No need to switch back to the IST stack. The current stack is either
@@@ -517,7 -517,7 +517,7 @@@
  
        /* Switch to the regular task stack */
  .Lfrom_usermode_switch_stack_\@:
 -      idtentry_body safe_stack_\cfunc, has_error_code=1
 +      idtentry_body user_\cfunc, has_error_code=1
  
  _ASM_NOKPROBE(\asmsym)
  SYM_CODE_END(\asmsym)

diff --combined arch/x86/kernel/cpu/common.c
index 212e8bc,6cf6975..a99d003
--- 1/arch/x86/kernel/cpu/common.c
--- 2/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@@ -1773,10 -1773,16 +1773,16 @@@ void syscall_init(void
        wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL);
  #endif
  
-       /* Flags to clear on syscall */
+       /*
+        * Flags to clear on syscall; clear as much as possible
+        * to minimize user space-kernel interference.
+        */
        wrmsrl(MSR_SYSCALL_MASK,
-              X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|
-              X86_EFLAGS_IOPL|X86_EFLAGS_AC|X86_EFLAGS_NT);
+              X86_EFLAGS_CF|X86_EFLAGS_PF|X86_EFLAGS_AF|
+              X86_EFLAGS_ZF|X86_EFLAGS_SF|X86_EFLAGS_TF|
+              X86_EFLAGS_IF|X86_EFLAGS_DF|X86_EFLAGS_OF|
+              X86_EFLAGS_IOPL|X86_EFLAGS_NT|X86_EFLAGS_RF|
+              X86_EFLAGS_AC|X86_EFLAGS_ID);
  }
  
  #else /* CONFIG_X86_64 */
@@@ -1938,12 -1944,13 +1944,12 @@@ void cpu_init_exception_handling(void
  
  /*
   * cpu_init() initializes state that is per-CPU. Some data is already
 - * initialized (naturally) in the bootstrap process, such as the GDT
 - * and IDT. We reload them nevertheless, this function acts as a
 - * 'CPU state barrier', nothing should get across.
 + * initialized (naturally) in the bootstrap process, such as the GDT.  We
 + * reload it nevertheless, this function acts as a 'CPU state barrier',
 + * nothing should get across.
   */
  void cpu_init(void)
  {
 -      struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
        struct task_struct *cur = current;
        int cpu = raw_smp_processor_id();
  
@@@ -1956,6 -1963,8 +1962,6 @@@
            early_cpu_to_node(cpu) != NUMA_NO_NODE)
                set_numa_node(early_cpu_to_node(cpu));
  #endif
 -      setup_getcpu(cpu);
 -
        pr_debug("Initializing CPU#%d\n", cpu);
  
        if (IS_ENABLED(CONFIG_X86_64) || cpu_feature_enabled(X86_FEATURE_VME) ||
@@@ -1967,6 -1976,7 +1973,6 @@@
         * and set up the GDT descriptor:
         */
        switch_to_new_gdt(cpu);
 -      load_current_idt();
  
        if (IS_ENABLED(CONFIG_X86_64)) {
                loadsegment(fs, 0);
@@@ -1986,6 -1996,12 +1992,6 @@@
        initialize_tlbstate_and_flush();
        enter_lazy_tlb(&init_mm, cur);
  
 -      /* Initialize the TSS. */
 -      tss_setup_ist(tss);
 -      tss_setup_io_bitmap(tss);
 -      set_tss_desc(cpu, &get_cpu_entry_area(cpu)->tss.x86_tss);
 -
 -      load_TR_desc();
        /*
         * sp0 points to the entry trampoline stack regardless of what task
         * is running.
@@@ -2007,18 -2023,6 +2013,18 @@@
        load_fixmap_gdt(cpu);
  }
  
 +#ifdef CONFIG_SMP
 +void cpu_init_secondary(void)
 +{
 +      /*
 +       * Relies on the BP having set-up the IDT tables, which are loaded
 +       * on this CPU in cpu_init_exception_handling().
 +       */
 +      cpu_init_exception_handling();
 +      cpu_init();
 +}
 +#endif
 +
  /*
   * The microcode loader calls this upon late microcode load to recheck features,
   * only when microcode has been updated. Caller holds microcode_mutex and CPU