ASoC: mediatek: mt8192: fix tdm out data is valid on rising edge
authorJiaxin Yu <jiaxin.yu@mediatek.com>
Fri, 12 Mar 2021 02:26:45 +0000 (10:26 +0800)
committerMark Brown <broonie@kernel.org>
Fri, 12 Mar 2021 14:25:32 +0000 (14:25 +0000)
This patch correct tdm out bck inverse register to AUDIO_TOP_CON3[3].

Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1615516005-781-1-git-send-email-jiaxin.yu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/mediatek/mt8192/mt8192-dai-tdm.c
sound/soc/mediatek/mt8192/mt8192-reg.h

index f5de1d7..f3bebed 100644 (file)
@@ -555,7 +555,9 @@ static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream,
 
        /* set tdm */
        if (tdm_priv->bck_invert)
-               tdm_con |= 1 << BCK_INVERSE_SFT;
+               regmap_update_bits(afe->regmap, AUDIO_TOP_CON3,
+                                  BCK_INVERSE_MASK_SFT,
+                                  0x1 << BCK_INVERSE_SFT);
 
        if (tdm_priv->lck_invert)
                tdm_con |= 1 << LRCK_INVERSE_SFT;
index 562f25c..b9fb80d 100644 (file)
@@ -21,6 +21,11 @@ enum {
 /*****************************************************************************
  *                  R E G I S T E R       D E F I N I T I O N
  *****************************************************************************/
+/* AUDIO_TOP_CON3 */
+#define BCK_INVERSE_SFT                              3
+#define BCK_INVERSE_MASK                             0x1
+#define BCK_INVERSE_MASK_SFT                         (0x1 << 3)
+
 /* AFE_DAC_CON0 */
 #define VUL12_ON_SFT                                   31
 #define VUL12_ON_MASK                                  0x1
@@ -2079,9 +2084,6 @@ enum {
 #define TDM_EN_SFT                                     0
 #define TDM_EN_MASK                                    0x1
 #define TDM_EN_MASK_SFT                                (0x1 << 0)
-#define BCK_INVERSE_SFT                                1
-#define BCK_INVERSE_MASK                               0x1
-#define BCK_INVERSE_MASK_SFT                           (0x1 << 1)
 #define LRCK_INVERSE_SFT                               2
 #define LRCK_INVERSE_MASK                              0x1
 #define LRCK_INVERSE_MASK_SFT                          (0x1 << 2)