Revert "mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711"
authorUlf Hansson <ulf.hansson@linaro.org>
Fri, 27 Aug 2021 14:30:36 +0000 (16:30 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Fri, 27 Aug 2021 14:30:36 +0000 (16:30 +0200)
This reverts commit 419dd626e357e89fc9c4e3863592c8b38cfe1571.

It turned out that the change from the reverted commit breaks the ACPI
based rpi's because it causes the 100Mhz max clock to be overridden to the
return from sdhci_iproc_get_max_clock(), which is 0 because there isn't a
OF/DT based clock device.

Reported-by: Jeremy Linton <jeremy.linton@arm.com>
Fixes: 419dd626e357 ("mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711")
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-iproc.c

index e7565c6..032bf85 100644 (file)
@@ -295,8 +295,7 @@ static const struct sdhci_ops sdhci_iproc_bcm2711_ops = {
 };
 
 static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = {
-       .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
-                 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
+       .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
        .ops = &sdhci_iproc_bcm2711_ops,
 };