riscv: Optimize switch_mm by passing "cpu" to flush_icache_deferred()

Directly passing the cpu to flush_icache_deferred() rather than calling
smp_processor_id() again.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
[Palmer: drop the QEMU performance numbers, and update the comment]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
index 68aa312..83e7ae3 100644 (file)
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
@@ -280,11 +280,12 @@ static inline void set_mm(struct mm_struct *mm, unsigned int cpu)
  * cache flush to be performed before execution resumes on each hart.  This
  * actually performs that local instruction cache flush, which implicitly only
  * refers to the current hart.
+ *
+ * The "cpu" argument must be the current local CPU number.
  */
-static inline void flush_icache_deferred(struct mm_struct *mm)
+static inline void flush_icache_deferred(struct mm_struct *mm, unsigned int cpu)
 {
 #ifdef CONFIG_SMP
-       unsigned int cpu = smp_processor_id();
        cpumask_t *mask = &mm->context.icache_stale_mask;
 
        if (cpumask_test_cpu(cpu, mask)) {
@@ -320,5 +321,5 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 
        set_mm(next, cpu);
 
-       flush_icache_deferred(next);
+       flush_icache_deferred(next, cpu);
 }