perf/x86/intel/uncore: Fix the scale of the IMC free-running events

The "MiB" result of the IMC free-running bandwidth events,
uncore_imc_free_running/read/ and uncore_imc_free_running/write/ are 16
times too small.

The "MiB" value equals the raw IMC free-running bandwidth counter value
times a "scale" which is inaccurate.

The IMC free-running bandwidth events should be incremented per 64B
cache line, not DWs (4 bytes). The "scale" should be 6.103515625e-5.
Fix the "scale" for both Snow Ridge and Ice Lake.

Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server uncore support")
Fixes: ee49532b38dd ("perf/x86/intel/uncore: Add IMC uncore support for Snow Ridge")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200928133240.12977-1-kan.liang@linux.intel.com

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 3f1e75f..7bdb182 100644 (file)
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -4807,10 +4807,10 @@ static struct uncore_event_desc snr_uncore_imc_freerunning_events[] = {
        INTEL_UNCORE_EVENT_DESC(dclk,           "event=0xff,umask=0x10"),
 
        INTEL_UNCORE_EVENT_DESC(read,           "event=0xff,umask=0x20"),
-       INTEL_UNCORE_EVENT_DESC(read.scale,     "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(read.scale,     "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(read.unit,      "MiB"),
        INTEL_UNCORE_EVENT_DESC(write,          "event=0xff,umask=0x21"),
-       INTEL_UNCORE_EVENT_DESC(write.scale,    "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(write.scale,    "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(write.unit,     "MiB"),
        { /* end: all zeroes */ },
 };
@@ -5268,17 +5268,17 @@ static struct uncore_event_desc icx_uncore_imc_freerunning_events[] = {
        INTEL_UNCORE_EVENT_DESC(dclk,                   "event=0xff,umask=0x10"),
 
        INTEL_UNCORE_EVENT_DESC(read,                   "event=0xff,umask=0x20"),
-       INTEL_UNCORE_EVENT_DESC(read.scale,             "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(read.scale,             "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(read.unit,              "MiB"),
        INTEL_UNCORE_EVENT_DESC(write,                  "event=0xff,umask=0x21"),
-       INTEL_UNCORE_EVENT_DESC(write.scale,            "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(write.scale,            "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(write.unit,             "MiB"),
 
        INTEL_UNCORE_EVENT_DESC(ddrt_read,              "event=0xff,umask=0x30"),
-       INTEL_UNCORE_EVENT_DESC(ddrt_read.scale,        "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(ddrt_read.scale,        "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(ddrt_read.unit,         "MiB"),
        INTEL_UNCORE_EVENT_DESC(ddrt_write,             "event=0xff,umask=0x31"),
-       INTEL_UNCORE_EVENT_DESC(ddrt_write.scale,       "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(ddrt_write.scale,       "6.103515625e-5"),
        INTEL_UNCORE_EVENT_DESC(ddrt_write.unit,        "MiB"),
        { /* end: all zeroes */ },
 };