Merge branch 'spi-5.3' into spi-5.4
authorMark Brown <broonie@kernel.org>
Fri, 23 Aug 2019 11:00:22 +0000 (12:00 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 23 Aug 2019 11:00:22 +0000 (12:00 +0100)
Documentation/devicetree/bindings/spi/spi-controller.yaml
drivers/spi/spi-bcm-qspi.c
drivers/spi/spi-bcm2835.c
drivers/spi/spi-dw-pci.c
drivers/spi/spi-fsl-qspi.c
drivers/spi/spi-gpio.c
drivers/spi/spi-pxa2xx.c
drivers/spi/spi-zynq-qspi.c

index 876c062..7323392 100644 (file)
@@ -31,7 +31,7 @@ properties:
       If that property is used, the number of chip selects will be
       increased automatically with max(cs-gpios, hardware chip selects).
 
-      So if, for example, the controller has 2 CS lines, and the
+      So if, for example, the controller has 4 CS lines, and the
       cs-gpios looks like this
         cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
 
@@ -73,7 +73,6 @@ patternProperties:
           Compatible of the SPI device.
 
       reg:
-        maxItems: 1
         minimum: 0
         maximum: 256
         description:
index 902bdbf..0dbfd24 100644 (file)
@@ -343,7 +343,7 @@ static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi,
 {
        int bpc = 0, bpp = 0;
        u8 command = op->cmd.opcode;
-       int width  = op->cmd.buswidth ? op->cmd.buswidth : SPI_NBITS_SINGLE;
+       int width = op->data.buswidth ? op->data.buswidth : SPI_NBITS_SINGLE;
        int addrlen = op->addr.nbytes;
        int flex_mode = 1;
 
@@ -981,7 +981,7 @@ static int bcm_qspi_exec_mem_op(struct spi_mem *mem,
        if (mspi_read)
                return bcm_qspi_mspi_exec_mem_op(spi, op);
 
-       ret = bcm_qspi_bspi_set_mode(qspi, op, -1);
+       ret = bcm_qspi_bspi_set_mode(qspi, op, 0);
 
        if (!ret)
                ret = bcm_qspi_bspi_exec_mem_op(spi, op);
index c967978..4b89e0a 100644 (file)
@@ -834,7 +834,8 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr,
        bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
 
        /* handle all the 3-wire mode */
-       if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf))
+       if (spi->mode & SPI_3WIRE && tfr->rx_buf &&
+           tfr->rx_buf != ctlr->dummy_rx)
                cs |= BCM2835_SPI_CS_REN;
        else
                cs &= ~BCM2835_SPI_CS_REN;
index c1e2401..4e3a4c3 100644 (file)
@@ -19,6 +19,7 @@ struct spi_pci_desc {
        int     (*setup)(struct dw_spi *);
        u16     num_cs;
        u16     bus_num;
+       u32     max_freq;
 };
 
 static struct spi_pci_desc spi_pci_mid_desc_1 = {
@@ -33,6 +34,12 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = {
        .bus_num = 1,
 };
 
+static struct spi_pci_desc spi_pci_ehl_desc = {
+       .num_cs = 1,
+       .bus_num = -1,
+       .max_freq = 100000000,
+};
+
 static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
        struct dw_spi *dws;
@@ -65,6 +72,7 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (desc) {
                dws->num_cs = desc->num_cs;
                dws->bus_num = desc->bus_num;
+               dws->max_freq = desc->max_freq;
 
                if (desc->setup) {
                        ret = desc->setup(dws);
@@ -123,6 +131,11 @@ static const struct pci_device_id pci_ids[] = {
        { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
        /* Intel MID platform SPI controller 2 */
        { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
+       /* Intel Elkhart Lake PSE SPI controllers */
+       { PCI_VDEVICE(INTEL, 0x4b84), (kernel_ulong_t)&spi_pci_ehl_desc},
+       { PCI_VDEVICE(INTEL, 0x4b85), (kernel_ulong_t)&spi_pci_ehl_desc},
+       { PCI_VDEVICE(INTEL, 0x4b86), (kernel_ulong_t)&spi_pci_ehl_desc},
+       { PCI_VDEVICE(INTEL, 0x4b87), (kernel_ulong_t)&spi_pci_ehl_desc},
        {},
 };
 
index 443d4c1..c02e24c 100644 (file)
@@ -206,7 +206,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = {
 };
 
 static const struct fsl_qspi_devtype_data imx7d_data = {
-       .rxfifo = SZ_512,
+       .rxfifo = SZ_128,
        .txfifo = SZ_512,
        .ahb_buf_size = SZ_1K,
        .quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK,
index eca9d52..9eb8215 100644 (file)
@@ -410,6 +410,12 @@ static int spi_gpio_probe(struct platform_device *pdev)
 
        bb = &spi_gpio->bitbang;
        bb->master = master;
+       /*
+        * There is some additional business, apart from driving the CS GPIO
+        * line, that we need to do on selection. This makes the local
+        * callback for chipselect always get called.
+        */
+       master->flags |= SPI_MASTER_GPIO_SS;
        bb->chipselect = spi_gpio_chipselect;
        bb->set_line_direction = spi_gpio_set_direction;
 
index fc7ab4b..bb6a14d 100644 (file)
@@ -1457,6 +1457,14 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
        { PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
        { PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
        { PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
+       /* TGL-LP */
+       { PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP },
+       { PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP },
        { },
 };
 
@@ -1831,14 +1839,16 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
        status = devm_spi_register_controller(&pdev->dev, controller);
        if (status != 0) {
                dev_err(&pdev->dev, "problem registering spi controller\n");
-               goto out_error_clock_enabled;
+               goto out_error_pm_runtime_enabled;
        }
 
        return status;
 
-out_error_clock_enabled:
+out_error_pm_runtime_enabled:
        pm_runtime_put_noidle(&pdev->dev);
        pm_runtime_disable(&pdev->dev);
+
+out_error_clock_enabled:
        clk_disable_unprepare(ssp->clk);
 
 out_error_dma_irq_alloc:
index 3155e2c..4a5326c 100644 (file)
@@ -694,7 +694,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
        ctlr->setup = zynq_qspi_setup_op;
        ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
        ctlr->dev.of_node = np;
-       ret = spi_register_controller(ctlr);
+       ret = devm_spi_register_controller(&pdev->dev, ctlr);
        if (ret) {
                dev_err(&pdev->dev, "spi_register_master failed\n");
                goto clk_dis_all;