riscv: traps_misaligned: do not duplicate stringify
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 23 Jun 2022 11:29:05 +0000 (13:29 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Aug 2022 15:56:53 +0000 (08:56 -0700)
Use existing stringify macro from the kernel headers.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20220623112905.253157-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/traps_misaligned.c

index 46c4daf..378f5b1 100644 (file)
@@ -7,6 +7,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/irq.h>
+#include <linux/stringify.h>
 
 #include <asm/processor.h>
 #include <asm/ptrace.h>
 #define PRECISION_S 0
 #define PRECISION_D 1
 
-#define STR(x) XSTR(x)
-#define XSTR(x) #x
-
 #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                 \
 static inline type load_##type(const type *addr)                       \
 {                                                                      \
@@ -207,9 +205,9 @@ static inline ulong get_insn(ulong mepc)
        asm ("and %[tmp], %[addr], 2\n"
                "bnez %[tmp], 1f\n"
 #if defined(CONFIG_64BIT)
-               STR(LWU) " %[insn], (%[addr])\n"
+               __stringify(LWU) " %[insn], (%[addr])\n"
 #else
-               STR(LW) " %[insn], (%[addr])\n"
+               __stringify(LW) " %[insn], (%[addr])\n"
 #endif
                "and %[tmp], %[insn], %[rvc_mask]\n"
                "beq %[tmp], %[rvc_mask], 2f\n"