clk: qcom: gcc-msm8994: Fix gpll4 width
authorKonrad Dybcio <konrad.dybcio@somainline.org>
Sat, 19 Mar 2022 17:49:40 +0000 (18:49 +0100)
committerStephen Boyd <sboyd@kernel.org>
Fri, 25 Mar 2022 00:52:51 +0000 (17:52 -0700)
The gpll4 postdiv is actually a div4, so make sure that Linux is aware of
this.

This fixes the following error messages:

 mmc1: Card appears overclocked; req 200000000 Hz, actual 343999999 Hz
 mmc1: Card appears overclocked; req 400000000 Hz, actual 687999999 Hz

Fixes: aec89f78cf01 ("clk: qcom: Add support for msm8994 global clock controller")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220319174940.341137-1-konrad.dybcio@somainline.org
Tested-by: Petr Vorel <petr.vorel@gmail.com>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/qcom/gcc-msm8994.c

index 71aa630..bd027d5 100644 (file)
@@ -77,6 +77,7 @@ static struct clk_alpha_pll gpll4_early = {
 
 static struct clk_alpha_pll_postdiv gpll4 = {
        .offset = 0x1dc0,
+       .width = 4,
        .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
        .clkr.hw.init = &(struct clk_init_data){
                .name = "gpll4",