soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.c

When trying to build this for a 64-bit platform, one gets warnings
from using IS_ERR_VALUE on something which is not sizeof(long).

Instead, change the various *_offset fields to store a signed integer,
and simply check for a negative return from qe_muram_alloc(). Since
qe_muram_free() now accepts and ignores a negative argument, we only
need to make sure these fields are initialized with -1, and we can
just unconditionally call qe_muram_free() in ucc_slow_free().

Note that the error case for us_pram_offset failed to set that field
to 0 (which, as noted earlier, is anyway a bogus sentinel value).

Reviewed-by: Timur Tabi <timur@kernel.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Li Yang <leoyang.li@nxp.com>

diff --git a/drivers/soc/fsl/qe/ucc_slow.c b/drivers/soc/fsl/qe/ucc_slow.c
index 9b55fd0..274d344 100644 (file)
--- a/drivers/soc/fsl/qe/ucc_slow.c
+++ b/drivers/soc/fsl/qe/ucc_slow.c
@@ -154,6 +154,9 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
                        __func__);
                return -ENOMEM;
        }
+       uccs->rx_base_offset = -1;
+       uccs->tx_base_offset = -1;
+       uccs->us_pram_offset = -1;
 
        /* Fill slow UCC structure */
        uccs->us_info = us_info;
@@ -179,7 +182,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
        /* Get PRAM base */
        uccs->us_pram_offset =
                qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
-       if (IS_ERR_VALUE(uccs->us_pram_offset)) {
+       if (uccs->us_pram_offset < 0) {
                printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __func__);
                ucc_slow_free(uccs);
                return -ENOMEM;
@@ -206,10 +209,9 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
        uccs->rx_base_offset =
                qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
                                QE_ALIGNMENT_OF_BD);
-       if (IS_ERR_VALUE(uccs->rx_base_offset)) {
+       if (uccs->rx_base_offset < 0) {
                printk(KERN_ERR "%s: cannot allocate %u RX BDs\n", __func__,
                        us_info->rx_bd_ring_len);
-               uccs->rx_base_offset = 0;
                ucc_slow_free(uccs);
                return -ENOMEM;
        }
@@ -217,9 +219,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
        uccs->tx_base_offset =
                qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
                        QE_ALIGNMENT_OF_BD);
-       if (IS_ERR_VALUE(uccs->tx_base_offset)) {
+       if (uccs->tx_base_offset < 0) {
                printk(KERN_ERR "%s: cannot allocate TX BDs", __func__);
-               uccs->tx_base_offset = 0;
                ucc_slow_free(uccs);
                return -ENOMEM;
        }
@@ -352,14 +353,9 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
        if (!uccs)
                return;
 
-       if (uccs->rx_base_offset)
-               qe_muram_free(uccs->rx_base_offset);
-
-       if (uccs->tx_base_offset)
-               qe_muram_free(uccs->tx_base_offset);
-
-       if (uccs->us_pram)
-               qe_muram_free(uccs->us_pram_offset);
+       qe_muram_free(uccs->rx_base_offset);
+       qe_muram_free(uccs->tx_base_offset);
+       qe_muram_free(uccs->us_pram_offset);
 
        if (uccs->us_regs)
                iounmap(uccs->us_regs);

diff --git a/include/soc/fsl/qe/ucc_slow.h b/include/soc/fsl/qe/ucc_slow.h
index 8696fde..d187a6b 100644 (file)
--- a/include/soc/fsl/qe/ucc_slow.h
+++ b/include/soc/fsl/qe/ucc_slow.h
@@ -185,7 +185,7 @@ struct ucc_slow_private {
        struct ucc_slow_info *us_info;
        struct ucc_slow __iomem *us_regs; /* Ptr to memory map of UCC regs */
        struct ucc_slow_pram *us_pram;  /* a pointer to the parameter RAM */
-       u32 us_pram_offset;
+       s32 us_pram_offset;
        int enabled_tx;         /* Whether channel is enabled for Tx (ENT) */
        int enabled_rx;         /* Whether channel is enabled for Rx (ENR) */
        int stopped_tx;         /* Whether channel has been stopped for Tx
@@ -194,8 +194,8 @@ struct ucc_slow_private {
        struct list_head confQ; /* frames passed to chip waiting for tx */
        u32 first_tx_bd_mask;   /* mask is used in Tx routine to save status
                                   and length for first BD in a frame */
-       u32 tx_base_offset;     /* first BD in Tx BD table offset (In MURAM) */
-       u32 rx_base_offset;     /* first BD in Rx BD table offset (In MURAM) */
+       s32 tx_base_offset;     /* first BD in Tx BD table offset (In MURAM) */
+       s32 rx_base_offset;     /* first BD in Rx BD table offset (In MURAM) */
        struct qe_bd *confBd;   /* next BD for confirm after Tx */
        struct qe_bd *tx_bd;    /* next BD for new Tx request */
        struct qe_bd *rx_bd;    /* next BD to collect after Rx */