pinctrl: renesas: r8a77951: Add vin4_g8 and vin5_high8 pins
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tue, 9 Mar 2021 11:49:27 +0000 (12:49 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 10 Mar 2021 09:50:26 +0000 (10:50 +0100)
This patch adds vin4_g8 and vin5_high8 support to the R8A77951 SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20210309114930.2433711-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/pfc-r8a77951.c

index bdd605e..6f3a162 100644 (file)
@@ -4126,6 +4126,18 @@ static const union vin_data vin4_data_b_mux = {
                VI4_DATA22_MARK, VI4_DATA23_MARK,
        },
 };
+static const unsigned int vin4_g8_pins[] = {
+       RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 1),
+       RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),
+       RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
+       RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_g8_mux[] = {
+       VI4_DATA8_MARK,  VI4_DATA9_MARK,
+       VI4_DATA10_MARK, VI4_DATA11_MARK,
+       VI4_DATA12_MARK, VI4_DATA13_MARK,
+       VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
 static const unsigned int vin4_sync_pins[] = {
        /* HSYNC#, VSYNC# */
        RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4180,6 +4192,18 @@ static const union vin_data16 vin5_data_mux = {
                VI5_DATA14_MARK, VI5_DATA15_MARK,
        },
 };
+static const unsigned int vin5_high8_pins[] = {
+       RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+       RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+       RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
+       RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_high8_mux[] = {
+       VI5_DATA8_MARK,  VI5_DATA9_MARK,
+       VI5_DATA10_MARK, VI5_DATA11_MARK,
+       VI5_DATA12_MARK, VI5_DATA13_MARK,
+       VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
 static const unsigned int vin5_sync_pins[] = {
        /* HSYNC#, VSYNC# */
        RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4210,7 +4234,7 @@ static const unsigned int vin5_clk_mux[] = {
 };
 
 static const struct {
-       struct sh_pfc_pin_group common[326];
+       struct sh_pfc_pin_group common[328];
 #ifdef CONFIG_PINCTRL_PFC_R8A77951
        struct sh_pfc_pin_group automotive[30];
 #endif
@@ -4530,6 +4554,7 @@ static const struct {
                SH_PFC_PIN_GROUP(vin4_data18_b),
                VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
                VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+               SH_PFC_PIN_GROUP(vin4_g8),
                SH_PFC_PIN_GROUP(vin4_sync),
                SH_PFC_PIN_GROUP(vin4_field),
                SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4538,6 +4563,7 @@ static const struct {
                VIN_DATA_PIN_GROUP(vin5_data, 10),
                VIN_DATA_PIN_GROUP(vin5_data, 12),
                VIN_DATA_PIN_GROUP(vin5_data, 16),
+               SH_PFC_PIN_GROUP(vin5_high8),
                SH_PFC_PIN_GROUP(vin5_sync),
                SH_PFC_PIN_GROUP(vin5_field),
                SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5097,6 +5123,7 @@ static const char * const vin4_groups[] = {
        "vin4_data18_b",
        "vin4_data20_b",
        "vin4_data24_b",
+       "vin4_g8",
        "vin4_sync",
        "vin4_field",
        "vin4_clkenb",
@@ -5108,6 +5135,7 @@ static const char * const vin5_groups[] = {
        "vin5_data10",
        "vin5_data12",
        "vin5_data16",
+       "vin5_high8",
        "vin5_sync",
        "vin5_field",
        "vin5_clkenb",