kselftest/arm64: mte: Fix MTE feature detection
authorAndre Przywara <andre.przywara@arm.com>
Fri, 19 Mar 2021 16:53:29 +0000 (16:53 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 24 Mar 2021 15:43:14 +0000 (15:43 +0000)
To check whether the CPU and kernel support the MTE features we want
to test, we use an (emulated) CPU ID register read. However we only
check against a very particular feature version (0b0010), even though
the ARM ARM promises ID register features to be backwards compatible.

While this could be fixed by using ">=" instead of "==", we should
actually use the explicit HWCAP2_MTE hardware capability, exposed by the
kernel via the ELF auxiliary vectors.

That moves this responsibility to the kernel, and fixes running the
tests on machines with FEAT_MTE3 capability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Brown <broone@kernel.org>
Link: https://lore.kernel.org/r/20210319165334.29213-7-andre.przywara@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
tools/testing/selftests/arm64/mte/mte_common_util.c

index 4e887da..aa8a8a6 100644 (file)
@@ -291,22 +291,13 @@ int mte_switch_mode(int mte_option, unsigned long incl_mask)
        return 0;
 }
 
-#define ID_AA64PFR1_MTE_SHIFT          8
-#define ID_AA64PFR1_MTE                        2
-
 int mte_default_setup(void)
 {
-       unsigned long hwcaps = getauxval(AT_HWCAP);
+       unsigned long hwcaps2 = getauxval(AT_HWCAP2);
        unsigned long en = 0;
        int ret;
 
-       if (!(hwcaps & HWCAP_CPUID)) {
-               ksft_print_msg("FAIL: CPUID registers unavailable\n");
-               return KSFT_FAIL;
-       }
-       /* Read ID_AA64PFR1_EL1 register */
-       asm volatile("mrs %0, id_aa64pfr1_el1" : "=r"(hwcaps) : : "memory");
-       if (((hwcaps >> ID_AA64PFR1_MTE_SHIFT) & MT_TAG_MASK) != ID_AA64PFR1_MTE) {
+       if (!(hwcaps2 & HWCAP2_MTE)) {
                ksft_print_msg("FAIL: MTE features unavailable\n");
                return KSFT_SKIP;
        }