Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round has a diffstat dominated by Qualcomm clk drivers. Honestly
  though that's just a bunch of data so the diffstat reflects that.
  Looking beyond that there's just a bunch of updates all around in
  various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors
  that have a lot of patches in here.

  Overall the driver changes look to be mostly enabling more clks and
  non-critical fixes that we could hold until the next merge window.

  I'm especially excited about the series from Arnd that graduates
  clkdev to be the only implementation of clk_get() and clk_put().
  That's a good step in the right direction to migreate eveerything over
  to the common clk framework. Now we don't have to worry about clkdev
  specific details, they're just part of the clk API now.

  Core:
   - clkdev is now the only option, i.e. clk_get()/clk_put() is
     implemented in only one place in the kernel instead of in
     drivers/clk/clkdev.c and in architectures that want their own
     implementation

  New Drivers:
   - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant
     Clock Jitter Cleaner With Dual Loop PLLs
   - Qualcomm MDM9607 GCC
   - Qualcomm SC8180X display clks
   - Qualcomm SM6125 GCC
   - Qualcomm SM8250 CAMCC (camera)
   - Renesas RZ/G2L SoC
   - Hisilicon hi3559A SoC

  Updates:
   - Stop using clock-output-names in ST clk drivers (yay!)
   - Support secure mode of STM32MP1 SoCs
   - Improve clock support for Actions S500 SoC
   - duty cycle setting support on qcom clks
   - Add TI am33xx spread spectrum clock support
   - Use determine_rate() for the Amlogic pll ops instead of
     round_rate()
   - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
   - Improve Amlogic axg-audio controller error on deferral
   - Add NNA clocks on Amlogic g12a
   - Reduce memory footprint of Rockchip PLL rate tables
   - A fix for the newly added Rockchip rk3568 clk driver
   - Exported clock for the newly added Rockchip video decoder
   - Remove audio ipg clock from i.MX8MP
   - Remove deprecated legacy clock binding for i.MX SCU clock driver
   - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
   - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif,
     audio, parallel interface)
   - Add dedicated clock ops for i.MX paralel interface
   - Different fixes for clocks controlled by ATF on i.MX SoCs
   - Add A53/A72 frequency scaling support i.MX clk-scu driver
   - Add special case for DCSS clock on suspend for i.MX clk-scu driver
   - Add parent save/restore on suspend/resume to i.MX clk-scu driver
   - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
   - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
     bindings
   - Tegra clk driver no longer deasserts resets on clk_enable as it
     gets in the way of certain power-up sequences
   - Fix compile testing for Tegra clk driver
   - One patch to fix a divider on the Allwinner v3s Audio PLL
   - Add support for CPU core clock boost modes on Renesas R-Car Gen3
   - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
   - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and
     improve support for multiple parents
   - Switch Renesas RZ/N1 divider clocks to .determine_rate()
   - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
   - Convert ar7 to common clk framework
   - Convert ralink to common clk framework"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits)
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  ...

diff --combined arch/mips/Kconfig
index 4704a16,96ab1a2..ed2e3a5
--- 1/arch/mips/Kconfig
--- 2/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@@ -201,6 -201,7 +201,7 @@@ config MIPS_ALCHEM
  config AR7
        bool "Texas Instruments AR7"
        select BOOT_ELF32
+       select COMMON_CLK
        select DMA_NONCOHERENT
        select CEVT_R4K
        select CSRC_R4K
@@@ -215,7 -216,6 +216,6 @@@
        select SYS_SUPPORTS_ZBOOT_UART16550
        select GPIOLIB
        select VLYNQ
-       select HAVE_LEGACY_CLK
        help
          Support for the Texas Instruments AR7 System-on-a-Chip
          family: TNETD7100, 7200 and 7300.
@@@ -332,7 -332,6 +332,6 @@@ config BCM63X
        select SWAP_IO_SPACE
        select GPIOLIB
        select MIPS_L1_CACHE_SHIFT_4
-       select CLKDEV_LOOKUP
        select HAVE_LEGACY_CLK
        help
          Support for BCM63XX based boards
@@@ -446,7 -445,6 +445,6 @@@ config LANTI
        select GPIOLIB
        select SWAP_IO_SPACE
        select BOOT_RAW
-       select CLKDEV_LOOKUP
        select HAVE_LEGACY_CLK
        select USE_OF
        select PINCTRL
@@@ -630,6 -628,7 +628,7 @@@ config MACH_NINTENDO6
  config RALINK
        bool "Ralink based machines"
        select CEVT_R4K
+       select COMMON_CLK
        select CSRC_R4K
        select BOOT_RAW
        select DMA_NONCOHERENT
@@@ -642,7 -641,6 +641,6 @@@
        select SYS_SUPPORTS_MIPS16
        select SYS_SUPPORTS_ZBOOT
        select SYS_HAS_EARLY_PRINTK
-       select CLKDEV_LOOKUP
        select ARCH_HAS_RESET_CONTROLLER
        select RESET_CONTROLLER
  
@@@ -2867,7 -2865,7 +2865,7 @@@ config RANDOMIZE_BASE_MAX_OFFSE
  config NODES_SHIFT
        int
        default "6"
 -      depends on NEED_MULTIPLE_NODES
 +      depends on NUMA
  
  config HW_PERF_EVENTS
        bool "Enable hardware performance counter support for perf events"

diff --combined drivers/clocksource/Kconfig
index 9fa2823,9380873..eb661b5
--- 1/drivers/clocksource/Kconfig
--- 2/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@@ -358,23 -358,9 +358,23 @@@ config ARM_GLOBAL_TIME
        help
          This option enables support for the ARM global timer unit.
  
 +config ARM_GT_INITIAL_PRESCALER_VAL
 +      int "ARM global timer initial prescaler value"
 +      default 2 if ARCH_ZYNQ
 +      default 1
 +      depends on ARM_GLOBAL_TIMER
 +      help
 +        When the ARM global timer initializes, its current rate is declared
 +        to the kernel and maintained forever. Should it's parent clock
 +        change, the driver tries to fix the timer's internal prescaler.
 +        On some machs (i.e. Zynq) the initial prescaler value thus poses
 +        bounds about how much the parent clock is allowed to decrease or
 +        increase wrt the initial clock value.
 +        This affects CPU_FREQ max delta from the initial frequency.
 +
  config ARM_TIMER_SP804
        bool "Support for Dual Timer SP804 module" if COMPILE_TEST
-       depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP
+       depends on GENERIC_SCHED_CLOCK && HAVE_CLK
        select CLKSRC_MMIO
        select TIMER_OF if OF
  
@@@ -584,12 -570,12 +584,12 @@@ config H8300_TP
  
  config CLKSRC_IMX_GPT
        bool "Clocksource using i.MX GPT" if COMPILE_TEST
-       depends on (ARM || ARM64) && CLKDEV_LOOKUP
+       depends on (ARM || ARM64) && HAVE_CLK
        select CLKSRC_MMIO
  
  config CLKSRC_IMX_TPM
        bool "Clocksource using i.MX TPM" if COMPILE_TEST
-       depends on (ARM || ARM64) && CLKDEV_LOOKUP
+       depends on (ARM || ARM64) && HAVE_CLK
        select CLKSRC_MMIO
        select TIMER_OF
        help

diff --combined drivers/mmc/host/Kconfig
index 561184f,4f1468a..7131396
--- 1/drivers/mmc/host/Kconfig
--- 2/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@@ -329,7 -329,7 +329,7 @@@ config MMC_SDHCI_S3
  
  config MMC_SDHCI_PXAV3
        tristate "Marvell MMP2 SD Host Controller support (PXAV3)"
-       depends on CLKDEV_LOOKUP
+       depends on HAVE_CLK
        depends on MMC_SDHCI_PLTFM
        depends on ARCH_BERLIN || ARCH_MMP || ARCH_MVEBU || COMPILE_TEST
        default CPU_MMP2
@@@ -342,7 -342,7 +342,7 @@@
  
  config MMC_SDHCI_PXAV2
        tristate "Marvell PXA9XX SD Host Controller support (PXAV2)"
-       depends on CLKDEV_LOOKUP
+       depends on HAVE_CLK
        depends on MMC_SDHCI_PLTFM
        depends on ARCH_MMP || COMPILE_TEST
        default CPU_PXA910
@@@ -412,7 -412,7 +412,7 @@@ config MMC_SDHCI_MILBEAU
  
  config MMC_SDHCI_IPROC
        tristate "SDHCI support for the BCM2835 & iProc SD/MMC Controller"
 -      depends on ARCH_BCM2835 || ARCH_BCM_IPROC || COMPILE_TEST
 +      depends on ARCH_BCM2835 || ARCH_BCM_IPROC || ARCH_BRCMSTB || COMPILE_TEST
        depends on MMC_SDHCI_PLTFM
        depends on OF || ACPI
        default ARCH_BCM_IPROC