drm/panfrost: Export all GPU feature registers
authorSteven Price <steven.price@arm.com>
Wed, 24 Jul 2019 10:56:26 +0000 (11:56 +0100)
committerRob Herring <robh@kernel.org>
Thu, 25 Jul 2019 22:10:52 +0000 (16:10 -0600)
Midgard/Bifrost GPUs have a bunch of feature registers providing details
of what the hardware supports. Panfrost already reads these, this patch
exports them all to user space so that the jobs created by the user space
driver can be tuned for the particular hardware implementation.

Signed-off-by: Steven Price <steven.price@arm.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190724105626.53552-1-steven.price@arm.com
drivers/gpu/drm/panfrost/panfrost_device.h
drivers/gpu/drm/panfrost/panfrost_drv.c
drivers/gpu/drm/panfrost/panfrost_gpu.c
include/uapi/drm/panfrost_drm.h

index 83cc01c..ea5948f 100644 (file)
@@ -43,6 +43,7 @@ struct panfrost_features {
        u32 js_features[16];
 
        u32 nr_core_groups;
+       u32 thread_tls_alloc;
 
        unsigned long hw_features[64 / BITS_PER_LONG];
        unsigned long hw_issues[64 / BITS_PER_LONG];
index cb43ff4..b187daa 100644 (file)
@@ -32,10 +32,42 @@ static int panfrost_ioctl_get_param(struct drm_device *ddev, void *data, struct
        if (param->pad != 0)
                return -EINVAL;
 
+#define PANFROST_FEATURE(name, member)                 \
+       case DRM_PANFROST_PARAM_ ## name:               \
+               param->value = pfdev->features.member;  \
+               break
+#define PANFROST_FEATURE_ARRAY(name, member, max)                      \
+       case DRM_PANFROST_PARAM_ ## name ## 0 ...                       \
+               DRM_PANFROST_PARAM_ ## name ## max:                     \
+               param->value = pfdev->features.member[param->param -    \
+                       DRM_PANFROST_PARAM_ ## name ## 0];              \
+               break
+
        switch (param->param) {
-       case DRM_PANFROST_PARAM_GPU_PROD_ID:
-               param->value = pfdev->features.id;
-               break;
+               PANFROST_FEATURE(GPU_PROD_ID, id);
+               PANFROST_FEATURE(GPU_REVISION, revision);
+               PANFROST_FEATURE(SHADER_PRESENT, shader_present);
+               PANFROST_FEATURE(TILER_PRESENT, tiler_present);
+               PANFROST_FEATURE(L2_PRESENT, l2_present);
+               PANFROST_FEATURE(STACK_PRESENT, stack_present);
+               PANFROST_FEATURE(AS_PRESENT, as_present);
+               PANFROST_FEATURE(JS_PRESENT, js_present);
+               PANFROST_FEATURE(L2_FEATURES, l2_features);
+               PANFROST_FEATURE(CORE_FEATURES, core_features);
+               PANFROST_FEATURE(TILER_FEATURES, tiler_features);
+               PANFROST_FEATURE(MEM_FEATURES, mem_features);
+               PANFROST_FEATURE(MMU_FEATURES, mmu_features);
+               PANFROST_FEATURE(THREAD_FEATURES, thread_features);
+               PANFROST_FEATURE(MAX_THREADS, max_threads);
+               PANFROST_FEATURE(THREAD_MAX_WORKGROUP_SZ,
+                               thread_max_workgroup_sz);
+               PANFROST_FEATURE(THREAD_MAX_BARRIER_SZ,
+                               thread_max_barrier_sz);
+               PANFROST_FEATURE(COHERENCY_FEATURES, coherency_features);
+               PANFROST_FEATURE_ARRAY(TEXTURE_FEATURES, texture_features, 3);
+               PANFROST_FEATURE_ARRAY(JS_FEATURES, js_features, 15);
+               PANFROST_FEATURE(NR_CORE_GROUPS, nr_core_groups);
+               PANFROST_FEATURE(THREAD_TLS_ALLOC, thread_tls_alloc);
        default:
                return -EINVAL;
        }
index 20ab333..f67ed92 100644 (file)
@@ -232,6 +232,8 @@ static void panfrost_gpu_init_features(struct panfrost_device *pfdev)
        pfdev->features.stack_present = gpu_read(pfdev, GPU_STACK_PRESENT_LO);
        pfdev->features.stack_present |= (u64)gpu_read(pfdev, GPU_STACK_PRESENT_HI) << 32;
 
+       pfdev->features.thread_tls_alloc = gpu_read(pfdev, GPU_THREAD_TLS_ALLOC);
+
        gpu_id = gpu_read(pfdev, GPU_ID);
        pfdev->features.revision = gpu_id & 0xffff;
        pfdev->features.id = gpu_id >> 16;
index b5d3706..cb577fb 100644 (file)
@@ -127,6 +127,45 @@ struct drm_panfrost_mmap_bo {
 
 enum drm_panfrost_param {
        DRM_PANFROST_PARAM_GPU_PROD_ID,
+       DRM_PANFROST_PARAM_GPU_REVISION,
+       DRM_PANFROST_PARAM_SHADER_PRESENT,
+       DRM_PANFROST_PARAM_TILER_PRESENT,
+       DRM_PANFROST_PARAM_L2_PRESENT,
+       DRM_PANFROST_PARAM_STACK_PRESENT,
+       DRM_PANFROST_PARAM_AS_PRESENT,
+       DRM_PANFROST_PARAM_JS_PRESENT,
+       DRM_PANFROST_PARAM_L2_FEATURES,
+       DRM_PANFROST_PARAM_CORE_FEATURES,
+       DRM_PANFROST_PARAM_TILER_FEATURES,
+       DRM_PANFROST_PARAM_MEM_FEATURES,
+       DRM_PANFROST_PARAM_MMU_FEATURES,
+       DRM_PANFROST_PARAM_THREAD_FEATURES,
+       DRM_PANFROST_PARAM_MAX_THREADS,
+       DRM_PANFROST_PARAM_THREAD_MAX_WORKGROUP_SZ,
+       DRM_PANFROST_PARAM_THREAD_MAX_BARRIER_SZ,
+       DRM_PANFROST_PARAM_COHERENCY_FEATURES,
+       DRM_PANFROST_PARAM_TEXTURE_FEATURES0,
+       DRM_PANFROST_PARAM_TEXTURE_FEATURES1,
+       DRM_PANFROST_PARAM_TEXTURE_FEATURES2,
+       DRM_PANFROST_PARAM_TEXTURE_FEATURES3,
+       DRM_PANFROST_PARAM_JS_FEATURES0,
+       DRM_PANFROST_PARAM_JS_FEATURES1,
+       DRM_PANFROST_PARAM_JS_FEATURES2,
+       DRM_PANFROST_PARAM_JS_FEATURES3,
+       DRM_PANFROST_PARAM_JS_FEATURES4,
+       DRM_PANFROST_PARAM_JS_FEATURES5,
+       DRM_PANFROST_PARAM_JS_FEATURES6,
+       DRM_PANFROST_PARAM_JS_FEATURES7,
+       DRM_PANFROST_PARAM_JS_FEATURES8,
+       DRM_PANFROST_PARAM_JS_FEATURES9,
+       DRM_PANFROST_PARAM_JS_FEATURES10,
+       DRM_PANFROST_PARAM_JS_FEATURES11,
+       DRM_PANFROST_PARAM_JS_FEATURES12,
+       DRM_PANFROST_PARAM_JS_FEATURES13,
+       DRM_PANFROST_PARAM_JS_FEATURES14,
+       DRM_PANFROST_PARAM_JS_FEATURES15,
+       DRM_PANFROST_PARAM_NR_CORE_GROUPS,
+       DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,
 };
 
 struct drm_panfrost_get_param {