dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops
authorCai Huoqing <cai.huoqing@linux.dev>
Sat, 20 May 2023 05:08:49 +0000 (13:08 +0800)
committerVinod Koul <vkoul@kernel.org>
Wed, 24 May 2023 06:50:45 +0000 (12:20 +0530)
The dw_edma_core_ops structure contains a set of the operations:
device IRQ numbers getter, CPU/PCI address translation. Based on the
functions semantics the structure name "dw_edma_plat_ops" looks more
descriptive since indeed the operations are platform-specific. The
"dw_edma_core_ops" name shall be used for a structure with the IP-core
specific set of callbacks in order to abstract out DW eDMA and DW HDMA
setups. Such structure will be added in one of the next commit in the
framework of the set of changes adding the DW HDMA device support.

Anyway the renaming was necessary to distinguish two types of
the implementation callbacks:
1. DW eDMA/hDMA IP-core specific operations: device-specific CSR
setups in one or another aspect of the DMA-engine initialization.
2. DW eDMA/hDMA platform specific operations: the DMA device
environment configs like IRQs, address translation, etc.

Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20230520050854.73160-2-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/dw-edma/dw-edma-pcie.c
drivers/pci/controller/dwc/pcie-designware.c
include/linux/dma/edma.h

index 2b40f2b..1c60437 100644 (file)
@@ -109,7 +109,7 @@ static u64 dw_edma_pcie_address(struct device *dev, phys_addr_t cpu_addr)
        return region.start;
 }
 
-static const struct dw_edma_core_ops dw_edma_pcie_core_ops = {
+static const struct dw_edma_plat_ops dw_edma_pcie_plat_ops = {
        .irq_vector = dw_edma_pcie_irq_vector,
        .pci_address = dw_edma_pcie_address,
 };
@@ -225,7 +225,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
 
        chip->mf = vsec_data.mf;
        chip->nr_irqs = nr_irqs;
-       chip->ops = &dw_edma_pcie_core_ops;
+       chip->ops = &dw_edma_pcie_plat_ops;
 
        chip->ll_wr_cnt = vsec_data.wr_ch_cnt;
        chip->ll_rd_cnt = vsec_data.rd_ch_cnt;
index 8e33e6e..1f2ee71 100644 (file)
@@ -828,7 +828,7 @@ static int dw_pcie_edma_irq_vector(struct device *dev, unsigned int nr)
        return platform_get_irq_byname_optional(pdev, name);
 }
 
-static struct dw_edma_core_ops dw_pcie_edma_ops = {
+static struct dw_edma_plat_ops dw_pcie_edma_ops = {
        .irq_vector = dw_pcie_edma_irq_vector,
 };
 
index d2638d9..ed401c9 100644 (file)
@@ -40,7 +40,7 @@ struct dw_edma_region {
  *                     iATU windows. That will be done by the controller
  *                     automatically.
  */
-struct dw_edma_core_ops {
+struct dw_edma_plat_ops {
        int (*irq_vector)(struct device *dev, unsigned int nr);
        u64 (*pci_address)(struct device *dev, phys_addr_t cpu_addr);
 };
@@ -80,7 +80,7 @@ enum dw_edma_chip_flags {
 struct dw_edma_chip {
        struct device           *dev;
        int                     nr_irqs;
-       const struct dw_edma_core_ops   *ops;
+       const struct dw_edma_plat_ops   *ops;
        u32                     flags;
 
        void __iomem            *reg_base;