misc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL
authorBjorn Helgaas <bhelgaas@google.com>
Thu, 21 May 2020 18:05:43 +0000 (13:05 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 22 May 2020 07:38:13 +0000 (09:38 +0200)
Instead of using the driver-specific rtsx_pci_update_cfg_byte() to update
the PCIe Link Control Register, use pcie_capability_clear_and_set_word()
like the rest of the kernel does.  This makes it easier to maintain ASPM
across the PCI core and drivers.

Remove the now-unused rtsx_pci_update_cfg_byte() and ASPM_MASK_NEG
definitions.

No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20200521180545.1159896-5-helgaas@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/cardreader/rts5249.c
drivers/misc/cardreader/rts5260.c
drivers/misc/cardreader/rts5261.c
drivers/misc/cardreader/rtsx_pcr.c
drivers/misc/cardreader/rtsx_pcr.h
include/linux/rtsx_pci.h

index 5171fdd..d122608 100644 (file)
@@ -349,15 +349,12 @@ static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rts5249_set_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       u8 val = 0;
-
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (enable)
-               val = pcr->aspm_en;
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                ASPM_MASK_NEG, val);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC,
+                                          enable ? pcr->aspm_en : 0);
 
        pcr->aspm_enabled = enable;
 }
index b4c1386..75fc67d 100644 (file)
@@ -572,15 +572,12 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
 
 static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       u8 val = 0;
-
        if (pcr->aspm_enabled == enable)
                return;
 
-       if (enable)
-               val = pcr->aspm_en;
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                ASPM_MASK_NEG, val);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC,
+                                          enable ?  pcr->aspm : 0);
 
        pcr->aspm_enabled = enable;
 }
index a41e805..195822e 100644 (file)
@@ -518,28 +518,22 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
 
 static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       u8 val = 0;
-
        if (pcr->aspm_enabled == enable)
                return;
 
-       val = pcr->aspm_en;
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                ASPM_MASK_NEG, val);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
        pcr->aspm_enabled = enable;
 
 }
 
 static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable)
 {
-       u8 val = 0;
-
        if (pcr->aspm_enabled == enable)
                return;
 
-       val = 0;
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-                                ASPM_MASK_NEG, val);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC, 0);
        rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
        udelay(10);
        pcr->aspm_enabled = enable;
index afde549..a8ce9c3 100644 (file)
@@ -57,14 +57,14 @@ MODULE_DEVICE_TABLE(pci, rtsx_pci_ids);
 
 static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr)
 {
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-               ASPM_MASK_NEG, pcr->aspm_en);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
 }
 
 static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr)
 {
-       rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
-               ASPM_MASK_NEG, 0);
+       pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
+                                          PCI_EXP_LNKCTL_ASPMC, 0);
 }
 
 static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency)
index ed391df..024cbd9 100644 (file)
@@ -29,7 +29,6 @@
 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF    0xAC
 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF    0xF8
 #define CMD_TIMEOUT_DEF                100
-#define ASPM_MASK_NEG          0xFC
 #define MASK_8_BIT_DEF         0xFF
 
 #define SSC_CLOCK_STABLE_WAIT  130
index a75132a..e8780d4 100644 (file)
@@ -1307,18 +1307,6 @@ static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)
        return (u8 *)(pcr->host_cmds_ptr);
 }
 
-static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr,
-               u8 mask, u8 append)
-{
-       int err;
-       u8 val;
-
-       err = pci_read_config_byte(pcr->pci, addr, &val);
-       if (err < 0)
-               return err;
-       return pci_write_config_byte(pcr->pci, addr, (val & mask) | append);
-}
-
 static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
 {
        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val >> 24);