drm/amdgpu: Resolve bug in UMC 6.7 error offset calculation
authorJohn Clements <john.clements@amd.com>
Tue, 13 Jul 2021 09:44:45 +0000 (17:44 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Jul 2021 15:42:50 +0000 (11:42 -0400)
Use correct channel and instance values

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 097230b..7cf653f 100644 (file)
@@ -1171,8 +1171,8 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
                break;
        case CHIP_ALDEBARAN:
                adev->umc.max_ras_err_cnt_per_query = UMC_V6_7_TOTAL_CHANNEL_NUM;
-               adev->umc.channel_inst_num = UMC_V6_7_CHANNEL_INSTANCE_NUM;
-               adev->umc.umc_inst_num = UMC_V6_7_UMC_INSTANCE_NUM;
+               adev->umc.channel_inst_num = UMC_V6_7_UMC_INSTANCE_NUM;
+               adev->umc.umc_inst_num = UMC_V6_7_CHANNEL_INSTANCE_NUM;
                adev->umc.channel_offs = UMC_V6_7_PER_CHANNEL_OFFSET;
                if (!adev->gmc.xgmi.connected_to_cpu)
                        adev->umc.ras_funcs = &umc_v6_7_ras_funcs;