Merge tag 'arm-soc-fixes-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git...

Pull ARM SoC fixes from Arnd Bergmann:
 "Another set of patches for devicetree files and Arm SoC specific
  drivers:

   - A fix for OP-TEE shared memory on non-SMP systems

   - multiple code fixes for the OMAP platform, including one regression
     for the CPSW network driver and a few runtime warning fixes

   - Some DT patches for the Rockchip RK3399 platform, in particular
     fixing the MMC device ordering that recently became
     nondeterministic with async probe.

   - Multiple DT fixes for the Tegra platform, including a regression
     fix for suspend/resume on TX2

   - A regression fix for a user-triggered fault in the NXP dpio driver

   - A regression fix for a bug caused by an earlier bug fix in the
     xilinx firmware driver

   - Two more DTC warning fixes

   - Sylvain Lemieux steps down as maintainer for the NXP LPC32xx
     platform"

* tag 'arm-soc-fixes-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
  arm64: tegra: Fix Tegra234 VDK node names
  arm64: tegra: Wrong AON HSP reg property size
  arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1
  arm64: tegra: Correct the UART for Jetson Xavier NX
  arm64: tegra: Disable the ACONNECT for Jetson TX2
  optee: add writeback to valid memory type
  firmware: xilinx: Use hash-table for api feature check
  firmware: xilinx: Fix SD DLL node reset issue
  soc: fsl: dpio: Get the cpumask through cpumask_of(cpu)
  ARM: dts: dra76x: m_can: fix order of clocks
  bus: ti-sysc: suppress err msg for timers used as clockevent/source
  MAINTAINERS: Remove myself as LPC32xx maintainers
  arm64: dts: qcom: clear the warnings caused by empty dma-ranges
  arm64: dts: broadcom: clear the warnings caused by empty dma-ranges
  ARM: dts: am437x-l4: fix compatible for cpsw switch dt node
  arm64: dts: rockchip: Reorder LED triggers from mmc devices on rk3399-roc-pc.
  arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.
  arm64: dts: rockchip: Remove system-power-controller from pmic on Odroid Go Advance
  arm64: dts: rockchip: fix NanoPi R2S GMAC clock name
  ARM: OMAP2+: Manage MPU state properly for omap_enter_idle_coupled()
  ...

diff --git a/MAINTAINERS b/MAINTAINERS
index a7e3bb9..48cf2fe 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1995,7 +1995,6 @@ N:        lpc18xx
 
 ARM/LPC32XX SOC SUPPORT
 M:     Vladimir Zapolskiy <vz@mleia.com>
-M:     Sylvain Lemieux <slemieux.tyco@gmail.com>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:     Maintained
 T:     git git://github.com/vzapolskiy/linux-lpc32xx.git

diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi
index c220dc3..243e35f 100644 (file)
--- a/arch/arm/boot/dts/am437x-l4.dtsi
+++ b/arch/arm/boot/dts/am437x-l4.dtsi
@@ -521,7 +521,7 @@
                        ranges = <0x0 0x100000 0x8000>;
 
                        mac_sw: switch@0 {
-                               compatible = "ti,am4372-cpsw","ti,cpsw-switch";
+                               compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch";
                                reg = <0x0 0x4000>;
                                ranges = <0 0 0x4000>;
                                clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;

diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
index b69c7d4..2f32615 100644 (file)
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x.dtsi
@@ -32,8 +32,8 @@
                                interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-names = "int0", "int1";
-                               clocks = <&mcan_clk>, <&l3_iclk_div>;
-                               clock-names = "cclk", "hclk";
+                               clocks = <&l3_iclk_div>, <&mcan_clk>;
+                               clock-names = "hclk", "cclk";
                                bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
                        };
                };

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3ee7bdf..3f62a0c 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -7,7 +7,6 @@ config ARCH_OMAP2
        depends on ARCH_MULTI_V6
        select ARCH_OMAP2PLUS
        select CPU_V6
-       select PM_GENERIC_DOMAINS if PM
        select SOC_HAS_OMAP2_SDRC
 
 config ARCH_OMAP3
@@ -106,6 +105,8 @@ config ARCH_OMAP2PLUS
        select OMAP_DM_TIMER
        select OMAP_GPMC
        select PINCTRL
+       select PM_GENERIC_DOMAINS if PM
+       select PM_GENERIC_DOMAINS_OF if PM
        select RESET_CONTROLLER
        select SOC_BUS
        select TI_SYSC

diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index a92d277..c8d317f 100644 (file)
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -175,8 +175,11 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
                if (mpuss_can_lose_context) {
                        error = cpu_cluster_pm_enter();
                        if (error) {
-                               omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON);
-                               goto cpu_cluster_pm_out;
+                               index = 0;
+                               cx = state_ptr + index;
+                               pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
+                               omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
+                               mpuss_can_lose_context = 0;
                        }
                }
        }
@@ -184,7 +187,6 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
        omap4_enter_lowpower(dev->cpu, cx->cpu_state);
        cpu_done[dev->cpu] = true;
 
-cpu_cluster_pm_out:
        /* Wakeup CPU1 only if it is not offlined */
        if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
 

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
index 55259f9..aef8f2b 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
@@ -5,20 +5,20 @@
        usb {
                compatible = "simple-bus";
                dma-ranges;
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges = <0x0 0x0 0x68500000 0x00400000>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges = <0x0 0x0 0x0 0x68500000 0x0 0x00400000>;
 
                usbphy0: usb-phy@0 {
                        compatible = "brcm,sr-usb-combo-phy";
-                       reg = <0x00000000 0x100>;
+                       reg = <0x0 0x00000000 0x0 0x100>;
                        #phy-cells = <1>;
                        status = "disabled";
                };
 
                xhci0: usb@1000 {
                        compatible = "generic-xhci";
-                       reg = <0x00001000 0x1000>;
+                       reg = <0x0 0x00001000 0x0 0x1000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
                        phys = <&usbphy0 1>, <&usbphy0 0>;
                        phy-names = "phy0", "phy1";
@@ -28,7 +28,7 @@
 
                bdc0: usb@2000 {
                        compatible = "brcm,bdc-v0.16";
-                       reg = <0x00002000 0x1000>;
+                       reg = <0x0 0x00002000 0x0 0x1000>;
                        interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
                        phys = <&usbphy0 0>, <&usbphy0 1>;
                        phy-names = "phy0", "phy1";
@@ -38,21 +38,21 @@
 
                usbphy1: usb-phy@10000 {
                        compatible = "brcm,sr-usb-combo-phy";
-                       reg = <0x00010000 0x100>;
+                       reg = <0x0 0x00010000 0x0 0x100>;
                        #phy-cells = <1>;
                        status = "disabled";
                };
 
                usbphy2: usb-phy@20000 {
                        compatible = "brcm,sr-usb-hs-phy";
-                       reg = <0x00020000 0x100>;
+                       reg = <0x0 0x00020000 0x0 0x100>;
                        #phy-cells = <0>;
                        status = "disabled";
                };
 
                xhci1: usb@11000 {
                        compatible = "generic-xhci";
-                       reg = <0x00011000 0x1000>;
+                       reg = <0x0 0x00011000 0x0 0x1000>;
                        interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
                        phys = <&usbphy1 1>, <&usbphy2>, <&usbphy1 0>;
                        phy-names = "phy0", "phy1", "phy2";
@@ -62,7 +62,7 @@
 
                bdc1: usb@21000 {
                        compatible = "brcm,bdc-v0.16";
-                       reg = <0x00021000 0x1000>;
+                       reg = <0x0 0x00021000 0x0 0x1000>;
                        interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
                        phys = <&usbphy2>;
                        phy-names = "phy0";

diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index 381a849..c28d51c 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -10,18 +10,6 @@
        model = "NVIDIA Jetson TX2 Developer Kit";
        compatible = "nvidia,p2771-0000", "nvidia,tegra186";
 
-       aconnect {
-               status = "okay";
-
-               dma-controller@2930000 {
-                       status = "okay";
-               };
-
-               interrupt-controller@2a40000 {
-                       status = "okay";
-               };
-       };
-
        i2c@3160000 {
                power-monitor@42 {
                        compatible = "ti,ina3221";

diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi
index a2893be..0dc8304 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi
@@ -54,7 +54,7 @@
                        status = "okay";
                };
 
-               serial@c280000 {
+               serial@3100000 {
                        status = "okay";
                };
 

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index e9c90f0..93438d2 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1161,7 +1161,7 @@
 
                hsp_aon: hsp@c150000 {
                        compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
-                       reg = <0x0c150000 0xa0000>;
+                       reg = <0x0c150000 0x90000>;
                        interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index e18e1a9..a9caaf7 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -1663,16 +1663,6 @@
                vin-supply = <&vdd_5v0_sys>;
        };
 
-       vdd_usb_vbus_otg: regulator@11 {
-               compatible = "regulator-fixed";
-               regulator-name = "USB_VBUS_EN0";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-               vin-supply = <&vdd_5v0_sys>;
-       };
-
        vdd_hdmi: regulator@10 {
                compatible = "regulator-fixed";
                regulator-name = "VDD_HDMI_5V0";
@@ -1712,4 +1702,14 @@
                enable-active-high;
                vin-supply = <&vdd_3v3_sys>;
        };
+
+       vdd_usb_vbus_otg: regulator@14 {
+               compatible = "regulator-fixed";
+               regulator-name = "USB_VBUS_EN0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&vdd_5v0_sys>;
+       };
 };

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
index f6e6a24..b5d9a55 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts
@@ -8,7 +8,7 @@
        compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
 
        aliases {
-               sdhci3 = "/cbb@0/sdhci@3460000";
+               mmc3 = "/bus@0/mmc@3460000";
                serial0 = &uarta;
        };
 
@@ -17,12 +17,12 @@
                stdout-path = "serial0:115200n8";
        };
 
-       cbb@0 {
+       bus@0 {
                serial@3100000 {
                        status = "okay";
                };
 
-               sdhci@3460000 {
+               mmc@3460000 {
                        status = "okay";
                        bus-width = <8>;
                        non-removable;

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a94dac7..59e0cbf 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -179,22 +179,22 @@
        };
 
        soc: soc {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges = <0 0 0 0xffffffff>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges = <0 0 0 0 0x0 0xffffffff>;
                dma-ranges;
                compatible = "simple-bus";
 
                prng: qrng@e1000 {
                        compatible = "qcom,prng-ee";
-                       reg = <0xe3000 0x1000>;
+                       reg = <0x0 0xe3000 0x0 0x1000>;
                        clocks = <&gcc GCC_PRNG_AHB_CLK>;
                        clock-names = "core";
                };
 
                cryptobam: dma@704000 {
                        compatible = "qcom,bam-v1.7.0";
-                       reg = <0x00704000 0x20000>;
+                       reg = <0x0 0x00704000 0x0 0x20000>;
                        interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
                        clock-names = "bam_clk";
@@ -206,7 +206,7 @@
 
                crypto: crypto@73a000 {
                        compatible = "qcom,crypto-v5.1";
-                       reg = <0x0073a000 0x6000>;
+                       reg = <0x0 0x0073a000 0x0 0x6000>;
                        clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
                                <&gcc GCC_CRYPTO_AXI_CLK>,
                                <&gcc GCC_CRYPTO_CLK>;
@@ -217,7 +217,7 @@
 
                tlmm: pinctrl@1000000 {
                        compatible = "qcom,ipq6018-pinctrl";
-                       reg = <0x01000000 0x300000>;
+                       reg = <0x0 0x01000000 0x0 0x300000>;
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-controller;
                        #gpio-cells = <2>;
@@ -235,7 +235,7 @@
 
                gcc: gcc@1800000 {
                        compatible = "qcom,gcc-ipq6018";
-                       reg = <0x01800000 0x80000>;
+                       reg = <0x0 0x01800000 0x0 0x80000>;
                        clocks = <&xo>, <&sleep_clk>;
                        clock-names = "xo", "sleep_clk";
                        #clock-cells = <1>;
@@ -244,17 +244,17 @@
 
                tcsr_mutex_regs: syscon@1905000 {
                        compatible = "syscon";
-                       reg = <0x01905000 0x8000>;
+                       reg = <0x0 0x01905000 0x0 0x8000>;
                };
 
                tcsr_q6: syscon@1945000 {
                        compatible = "syscon";
-                       reg = <0x01945000 0xe000>;
+                       reg = <0x0 0x01945000 0x0 0xe000>;
                };
 
                blsp_dma: dma@7884000 {
                        compatible = "qcom,bam-v1.7.0";
-                       reg = <0x07884000 0x2b000>;
+                       reg = <0x0 0x07884000 0x0 0x2b000>;
                        interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "bam_clk";
@@ -264,7 +264,7 @@
 
                blsp1_uart3: serial@78b1000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
-                       reg = <0x078b1000 0x200>;
+                       reg = <0x0 0x078b1000 0x0 0x200>;
                        interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
                                <&gcc GCC_BLSP1_AHB_CLK>;
@@ -276,7 +276,7 @@
                        compatible = "qcom,spi-qup-v2.2.1";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       reg = <0x078b5000 0x600>;
+                       reg = <0x0 0x078b5000 0x0 0x600>;
                        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
                        spi-max-frequency = <50000000>;
                        clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
@@ -291,7 +291,7 @@
                        compatible = "qcom,spi-qup-v2.2.1";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       reg = <0x078b6000 0x600>;
+                       reg = <0x0 0x078b6000 0x0 0x600>;
                        interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        spi-max-frequency = <50000000>;
                        clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
@@ -306,7 +306,7 @@
                        compatible = "qcom,i2c-qup-v2.2.1";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       reg = <0x078b6000 0x600>;
+                       reg = <0x0 0x078b6000 0x0 0x600>;
                        interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_AHB_CLK>,
                                <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
@@ -321,7 +321,7 @@
                        compatible = "qcom,i2c-qup-v2.2.1";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       reg = <0x078b7000 0x600>;
+                       reg = <0x0 0x078b7000 0x0 0x600>;
                        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_AHB_CLK>,
                                <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
@@ -336,24 +336,24 @@
                        compatible = "qcom,msm-qgic2";
                        interrupt-controller;
                        #interrupt-cells = <0x3>;
-                       reg =   <0x0b000000 0x1000>,  /*GICD*/
-                               <0x0b002000 0x1000>,  /*GICC*/
-                               <0x0b001000 0x1000>,  /*GICH*/
-                               <0x0b004000 0x1000>;  /*GICV*/
+                       reg =   <0x0 0x0b000000 0x0 0x1000>,  /*GICD*/
+                               <0x0 0x0b002000 0x0 0x1000>,  /*GICC*/
+                               <0x0 0x0b001000 0x0 0x1000>,  /*GICH*/
+                               <0x0 0x0b004000 0x0 0x1000>;  /*GICV*/
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                watchdog@b017000 {
                        compatible = "qcom,kpss-wdt";
                        interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
-                       reg = <0x0b017000 0x40>;
+                       reg = <0x0 0x0b017000 0x0 0x40>;
                        clocks = <&sleep_clk>;
                        timeout-sec = <10>;
                };
 
                apcs_glb: mailbox@b111000 {
                        compatible = "qcom,ipq6018-apcs-apps-global";
-                       reg = <0x0b111000 0x1000>;
+                       reg = <0x0 0x0b111000 0x0 0x1000>;
                        #clock-cells = <1>;
                        clocks = <&a53pll>, <&xo>;
                        clock-names = "pll", "xo";
@@ -362,7 +362,7 @@
 
                a53pll: clock@b116000 {
                        compatible = "qcom,ipq6018-a53pll";
-                       reg = <0x0b116000 0x40>;
+                       reg = <0x0 0x0b116000 0x0 0x40>;
                        #clock-cells = <0>;
                        clocks = <&xo>;
                        clock-names = "xo";
@@ -377,68 +377,68 @@
                };
 
                timer@b120000 {
-                       #address-cells = <1>;
-                       #size-cells = <1>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
                        ranges;
                        compatible = "arm,armv7-timer-mem";
-                       reg = <0x0b120000 0x1000>;
+                       reg = <0x0 0x0b120000 0x0 0x1000>;
                        clock-frequency = <19200000>;
 
                        frame@b120000 {
                                frame-number = <0>;
                                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b121000 0x1000>,
-                                     <0x0b122000 0x1000>;
+                               reg = <0x0 0x0b121000 0x0 0x1000>,
+                                     <0x0 0x0b122000 0x0 0x1000>;
                        };
 
                        frame@b123000 {
                                frame-number = <1>;
                                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0xb123000 0x1000>;
+                               reg = <0x0 0xb123000 0x0 0x1000>;
                                status = "disabled";
                        };
 
                        frame@b124000 {
                                frame-number = <2>;
                                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b124000 0x1000>;
+                               reg = <0x0 0x0b124000 0x0 0x1000>;
                                status = "disabled";
                        };
 
                        frame@b125000 {
                                frame-number = <3>;
                                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b125000 0x1000>;
+                               reg = <0x0 0x0b125000 0x0 0x1000>;
                                status = "disabled";
                        };
 
                        frame@b126000 {
                                frame-number = <4>;
                                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b126000 0x1000>;
+                               reg = <0x0 0x0b126000 0x0 0x1000>;
                                status = "disabled";
                        };
 
                        frame@b127000 {
                                frame-number = <5>;
                                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b127000 0x1000>;
+                               reg = <0x0 0x0b127000 0x0 0x1000>;
                                status = "disabled";
                        };
 
                        frame@b128000 {
                                frame-number = <6>;
                                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x0b128000 0x1000>;
+                               reg = <0x0 0x0b128000 0x0 0x1000>;
                                status = "disabled";
                        };
                };
 
                q6v5_wcss: remoteproc@cd00000 {
                        compatible = "qcom,ipq8074-wcss-pil";
-                       reg = <0x0cd00000 0x4040>,
-                               <0x004ab000 0x20>;
+                       reg = <0x0 0x0cd00000 0x0 0x4040>,
+                             <0x0 0x004ab000 0x0 0x20>;
                        reg-names = "qdsp6",
                                    "rmb";
                        interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 35bd6b9..3376810 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -243,7 +243,6 @@
                interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&pmic_int>;
-               rockchip,system-power-controller;
                wakeup-source;
                #clock-cells = <1>;
                clock-output-names = "rk808-clkout1", "xin32k";

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
index be7a31d..2ee07d1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -20,7 +20,7 @@
        gmac_clk: gmac-clock {
                compatible = "fixed-clock";
                clock-frequency = <125000000>;
-               clock-output-names = "gmac_clk";
+               clock-output-names = "gmac_clkin";
                #clock-cells = <0>;
        };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index e7a459f..2030907 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -74,14 +74,14 @@
                        label = "red:diy";
                        gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
                        default-state = "off";
-                       linux,default-trigger = "mmc1";
+                       linux,default-trigger = "mmc2";
                };
 
                yellow_led: led-2 {
                        label = "yellow:yellow-led";
                        gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
                        default-state = "off";
-                       linux,default-trigger = "mmc0";
+                       linux,default-trigger = "mmc1";
                };
        };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index ada724b..7a9a7ac 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -29,6 +29,9 @@
                i2c6 = &i2c6;
                i2c7 = &i2c7;
                i2c8 = &i2c8;
+               mmc0 = &sdio0;
+               mmc1 = &sdmmc;
+               mmc2 = &sdhci;
                serial0 = &uart0;
                serial1 = &uart1;
                serial2 = &uart2;

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index efb088d..92ecf1a 100644 (file)
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -227,6 +227,9 @@ static int sysc_wait_softreset(struct sysc *ddata)
        u32 sysc_mask, syss_done, rstval;
        int syss_offset, error = 0;
 
+       if (ddata->cap->regbits->srst_shift < 0)
+               return 0;
+
        syss_offset = ddata->offsets[SYSC_SYSSTATUS];
        sysc_mask = BIT(ddata->cap->regbits->srst_shift);
 
@@ -970,9 +973,15 @@ static int sysc_enable_module(struct device *dev)
                        return error;
                }
        }
-       error = sysc_wait_softreset(ddata);
-       if (error)
-               dev_warn(ddata->dev, "OCP softreset timed out\n");
+       /*
+        * Some modules like i2c and hdq1w have unusable reset status unless
+        * the module reset quirk is enabled. Skip status check on enable.
+        */
+       if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
+               error = sysc_wait_softreset(ddata);
+               if (error)
+                       dev_warn(ddata->dev, "OCP softreset timed out\n");
+       }
        if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
                sysc_disable_opt_clocks(ddata);
 
@@ -1373,17 +1382,17 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
        SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff,
                   SYSC_QUIRK_OPT_CLKS_NEEDED),
        SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff,
-                  SYSC_MODULE_QUIRK_HDQ1W),
+                  SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff,
-                  SYSC_MODULE_QUIRK_HDQ1W),
+                  SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000036, 0x000000ff,
-                  SYSC_MODULE_QUIRK_I2C),
+                  SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x0000003c, 0x000000ff,
-                  SYSC_MODULE_QUIRK_I2C),
+                  SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000040, 0x000000ff,
-                  SYSC_MODULE_QUIRK_I2C),
+                  SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
-                  SYSC_MODULE_QUIRK_I2C),
+                  SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
        SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0),
        SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff,
                   SYSC_MODULE_QUIRK_SGX),
@@ -2880,7 +2889,7 @@ static int sysc_check_active_timer(struct sysc *ddata)
 
        if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
            (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
-               return -EBUSY;
+               return -ENXIO;
 
        return 0;
 }

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index efb8a66..d08ac82 100644 (file)
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -20,12 +20,28 @@
 #include <linux/of_platform.h>
 #include <linux/slab.h>
 #include <linux/uaccess.h>
+#include <linux/hashtable.h>
 
 #include <linux/firmware/xlnx-zynqmp.h>
 #include "zynqmp-debug.h"
 
+/* Max HashMap Order for PM API feature check (1<<7 = 128) */
+#define PM_API_FEATURE_CHECK_MAX_ORDER  7
+
 static bool feature_check_enabled;
-static u32 zynqmp_pm_features[PM_API_MAX];
+DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
+
+/**
+ * struct pm_api_feature_data - PM API Feature data
+ * @pm_api_id:         PM API Id, used as key to index into hashmap
+ * @feature_status:    status of PM API feature: valid, invalid
+ * @hentry:            hlist_node that hooks this entry into hashtable
+ */
+struct pm_api_feature_data {
+       u32 pm_api_id;
+       int feature_status;
+       struct hlist_node hentry;
+};
 
 static const struct mfd_cell firmware_devs[] = {
        {
@@ -142,29 +158,37 @@ static int zynqmp_pm_feature(u32 api_id)
        int ret;
        u32 ret_payload[PAYLOAD_ARG_CNT];
        u64 smc_arg[2];
+       struct pm_api_feature_data *feature_data;
 
        if (!feature_check_enabled)
                return 0;
 
-       /* Return value if feature is already checked */
-       if (api_id > ARRAY_SIZE(zynqmp_pm_features))
-               return PM_FEATURE_INVALID;
+       /* Check for existing entry in hash table for given api */
+       hash_for_each_possible(pm_api_features_map, feature_data, hentry,
+                              api_id) {
+               if (feature_data->pm_api_id == api_id)
+                       return feature_data->feature_status;
+       }
 
-       if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED)
-               return zynqmp_pm_features[api_id];
+       /* Add new entry if not present */
+       feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
+       if (!feature_data)
+               return -ENOMEM;
 
+       feature_data->pm_api_id = api_id;
        smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
        smc_arg[1] = api_id;
 
        ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
-       if (ret) {
-               zynqmp_pm_features[api_id] = PM_FEATURE_INVALID;
-               return PM_FEATURE_INVALID;
-       }
+       if (ret)
+               ret = -EOPNOTSUPP;
+       else
+               ret = ret_payload[1];
 
-       zynqmp_pm_features[api_id] = ret_payload[1];
+       feature_data->feature_status = ret;
+       hash_add(pm_api_features_map, &feature_data->hentry, api_id);
 
-       return zynqmp_pm_features[api_id];
+       return ret;
 }
 
 /**
@@ -200,9 +224,12 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
         * Make sure to stay in x0 register
         */
        u64 smc_arg[4];
+       int ret;
 
-       if (zynqmp_pm_feature(pm_api_id) == PM_FEATURE_INVALID)
-               return -ENOTSUPP;
+       /* Check if feature is supported or not */
+       ret = zynqmp_pm_feature(pm_api_id);
+       if (ret < 0)
+               return ret;
 
        smc_arg[0] = PM_SIP_SVC | pm_api_id;
        smc_arg[1] = ((u64)arg1 << 32) | arg0;
@@ -615,7 +642,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
  */
 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
 {
-       return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
+       return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
                                   type, 0, NULL);
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
@@ -1252,9 +1279,17 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
 
 static int zynqmp_firmware_remove(struct platform_device *pdev)
 {
+       struct pm_api_feature_data *feature_data;
+       int i;
+
        mfd_remove_devices(&pdev->dev);
        zynqmp_pm_api_debugfs_exit();
 
+       hash_for_each(pm_api_features_map, i, feature_data, hentry) {
+               hash_del(&feature_data->hentry);
+               kfree(feature_data);
+       }
+
        return 0;
 }
 

diff --git a/drivers/soc/fsl/dpio/dpio-driver.c b/drivers/soc/fsl/dpio/dpio-driver.c
index 7b642c3..7f397b4 100644 (file)
--- a/drivers/soc/fsl/dpio/dpio-driver.c
+++ b/drivers/soc/fsl/dpio/dpio-driver.c
@@ -95,7 +95,6 @@ static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
 {
        int error;
        struct fsl_mc_device_irq *irq;
-       cpumask_t mask;
 
        irq = dpio_dev->irqs[0];
        error = devm_request_irq(&dpio_dev->dev,
@@ -112,9 +111,7 @@ static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
        }
 
        /* set the affinity hint */
-       cpumask_clear(&mask);
-       cpumask_set_cpu(cpu, &mask);
-       if (irq_set_affinity_hint(irq->msi_desc->irq, &mask))
+       if (irq_set_affinity_hint(irq->msi_desc->irq, cpumask_of(cpu)))
                dev_err(&dpio_dev->dev,
                        "irq_set_affinity failed irq %d cpu %d\n",
                        irq->msi_desc->irq, cpu);

diff --git a/drivers/tee/optee/call.c b/drivers/tee/optee/call.c
index 20b6fd7..c981757 100644 (file)
--- a/drivers/tee/optee/call.c
+++ b/drivers/tee/optee/call.c
@@ -534,7 +534,8 @@ void optee_free_pages_list(void *list, size_t num_entries)
 static bool is_normal_memory(pgprot_t p)
 {
 #if defined(CONFIG_ARM)
-       return (pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEALLOC;
+       return (((pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEALLOC) ||
+               ((pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEBACK));
 #elif defined(CONFIG_ARM64)
        return (pgprot_val(p) & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL);
 #else

diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 5968df8..41a1bab 100644 (file)
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -50,10 +50,6 @@
 #define        ZYNQMP_PM_CAPABILITY_WAKEUP     0x4U
 #define        ZYNQMP_PM_CAPABILITY_UNUSABLE   0x8U
 
-/* Feature check status */
-#define PM_FEATURE_INVALID             -1
-#define PM_FEATURE_UNCHECKED           0
-
 /*
  * Firmware FPGA Manager flags
  * XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration

diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h
index c59999c..240dce5 100644 (file)
--- a/include/linux/platform_data/ti-sysc.h
+++ b/include/linux/platform_data/ti-sysc.h
@@ -50,6 +50,7 @@ struct sysc_regbits {
        s8 emufree_shift;
 };
 
+#define SYSC_MODULE_QUIRK_ENA_RESETDONE        BIT(25)
 #define SYSC_MODULE_QUIRK_PRUSS                BIT(24)
 #define SYSC_MODULE_QUIRK_DSS_RESET    BIT(23)
 #define SYSC_MODULE_QUIRK_RTC_UNLOCK   BIT(22)