Merge branch 'nvme-5.4' of git://git.infradead.org/nvme into for-linus

Pull NVMe changes from Sagi:

"This set consists of various fixes and cleanups:
 - controller removal race fix from Balbir
 - quirk additions from Gabriel and Jian-Hong
 - nvme-pci power state save fix from Mario
 - Add 64bit user commands (for 64bit registers) from Marta
 - nvme-rdma/nvme-tcp fixes from Max, Mark and Me
 - Minor cleanups and nits from James, Dan and John"

* 'nvme-5.4' of git://git.infradead.org/nvme:
  nvme-rdma: fix possible use-after-free in connect timeout
  nvme: Move ctrl sqsize to generic space
  nvme: Add ctrl attributes for queue_count and sqsize
  nvme: allow 64-bit results in passthru commands
  nvme: Add quirk for Kingston NVME SSD running FW E8FK11.T
  nvmet-tcp: remove superflous check on request sgl
  Added QUIRKs for ADATA XPG SX8200 Pro 512GB
  nvme-rdma: Fix max_hw_sectors calculation
  nvme: fix an error code in nvme_init_subsystem()
  nvme-pci: Save PCI state before putting drive into deepest state
  nvme-tcp: fix wrong stop condition in io_work
  nvme-pci: Fix a race in controller removal
  nvmet: change ppl to lpp

diff --combined drivers/nvme/host/pci.c
index c0808f9,7ab07f4..bb88681
--- 1/drivers/nvme/host/pci.c
--- 2/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@@ -549,10 -549,8 +549,10 @@@ static void nvme_unmap_data(struct nvme
  
        WARN_ON_ONCE(!iod->nents);
  
 -      /* P2PDMA requests do not need to be unmapped */
 -      if (!is_pci_p2pdma_page(sg_page(iod->sg)))
 +      if (is_pci_p2pdma_page(sg_page(iod->sg)))
 +              pci_p2pdma_unmap_sg(dev->dev, iod->sg, iod->nents,
 +                                  rq_dma_dir(req));
 +      else
                dma_unmap_sg(dev->dev, iod->sg, iod->nents, rq_dma_dir(req));
  
  
@@@ -836,8 -834,8 +836,8 @@@ static blk_status_t nvme_map_data(struc
                goto out;
  
        if (is_pci_p2pdma_page(sg_page(iod->sg)))
 -              nr_mapped = pci_p2pdma_map_sg(dev->dev, iod->sg, iod->nents,
 -                                            rq_dma_dir(req));
 +              nr_mapped = pci_p2pdma_map_sg_attrs(dev->dev, iod->sg,
 +                              iod->nents, rq_dma_dir(req), DMA_ATTR_NO_WARN);
        else
                nr_mapped = dma_map_sg_attrs(dev->dev, iod->sg, iod->nents,
                                             rq_dma_dir(req), DMA_ATTR_NO_WARN);
@@@ -2946,11 -2944,21 +2946,21 @@@ static int nvme_suspend(struct device *
        if (ret < 0)
                goto unfreeze;
  
+       /*
+        * A saved state prevents pci pm from generically controlling the
+        * device's power. If we're using protocol specific settings, we don't
+        * want pci interfering.
+        */
+       pci_save_state(pdev);
+ 
        ret = nvme_set_power_state(ctrl, ctrl->npss);
        if (ret < 0)
                goto unfreeze;
  
        if (ret) {
+               /* discard the saved state */
+               pci_load_saved_state(pdev, NULL);
+ 
                /*
                 * Clearing npss forces a controller reset on resume. The
                 * correct value will be resdicovered then.
@@@ -2958,14 -2966,7 +2968,7 @@@
                nvme_dev_disable(ndev, true);
                ctrl->npss = 0;
                ret = 0;
-               goto unfreeze;
        }
-       /*
-        * A saved state prevents pci pm from generically controlling the
-        * device's power. If we're using protocol specific settings, we don't
-        * want pci interfering.
-        */
-       pci_save_state(pdev);
  unfreeze:
        nvme_unfreeze(ctrl);
        return ret;
@@@ -3090,6 -3091,9 +3093,9 @@@ static const struct pci_device_id nvme_
                .driver_data = NVME_QUIRK_LIGHTNVM, },
        { PCI_DEVICE(0x10ec, 0x5762),   /* ADATA SX6000LNP */
                .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
+       { PCI_DEVICE(0x1cc1, 0x8201),   /* ADATA SX8200PNP 512GB */
+               .driver_data = NVME_QUIRK_NO_DEEPEST_PS |
+                               NVME_QUIRK_IGNORE_DEV_SUBNQN, },
        { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
        { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
        { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) },