drm/amdgpu: Remove redundant calls of ras_late_init in mca ras block
authoryipechai <YiPeng.Chai@amd.com>
Mon, 14 Feb 2022 06:25:48 +0000 (14:25 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Feb 2022 20:59:05 +0000 (15:59 -0500)
Remove redundant calls of ras_late_init in mca ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
drivers/gpu/drm/amd/amdgpu/mca_v3_0.c

index ebd4f14..dca1dc5 100644 (file)
@@ -476,19 +476,19 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
        }
 
        if (adev->mca.mp0.ras && adev->mca.mp0.ras->ras_block.ras_late_init) {
-               r = adev->mca.mp0.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->mca.mp0.ras->ras_block.ras_late_init(adev, adev->mca.mp0.ras_if);
                if (r)
                        return r;
        }
 
        if (adev->mca.mp1.ras && adev->mca.mp1.ras->ras_block.ras_late_init) {
-               r = adev->mca.mp1.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->mca.mp1.ras->ras_block.ras_late_init(adev, adev->mca.mp1.ras_if);
                if (r)
                        return r;
        }
 
        if (adev->mca.mpio.ras && adev->mca.mpio.ras->ras_block.ras_late_init) {
-               r = adev->mca.mpio.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->mca.mpio.ras->ras_block.ras_late_init(adev, adev->mca.mpio.ras_if);
                if (r)
                        return r;
        }
index 1c77fe7..e2607d9 100644 (file)
@@ -71,12 +71,6 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
        amdgpu_mca_reset_error_count(adev, mc_status_addr);
 }
 
-int amdgpu_mca_ras_late_init(struct amdgpu_device *adev,
-                            struct amdgpu_mca_ras *mca_dev)
-{
-       return amdgpu_ras_block_late_init(adev, mca_dev->ras_if);
-}
-
 void amdgpu_mca_ras_fini(struct amdgpu_device *adev,
                         struct amdgpu_mca_ras *mca_dev)
 {
index be030c4..15e1a1e 100644 (file)
@@ -56,9 +56,6 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
                                      uint64_t mc_status_addr,
                                      void *ras_error_status);
 
-int amdgpu_mca_ras_late_init(struct amdgpu_device *adev,
-                            struct amdgpu_mca_ras *mca_dev);
-
 void amdgpu_mca_ras_fini(struct amdgpu_device *adev,
                         struct amdgpu_mca_ras *mca_dev);
 
index 72ce19a..12d09a5 100644 (file)
@@ -37,11 +37,6 @@ static void mca_v3_0_mp0_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mp0_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
-       return amdgpu_mca_ras_late_init(adev, &adev->mca.mp0);
-}
-
 static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev)
 {
        amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
@@ -76,7 +71,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
                },
                .hw_ops = &mca_v3_0_mp0_hw_ops,
                .ras_block_match = mca_v3_0_ras_block_match,
-               .ras_late_init = mca_v3_0_mp0_ras_late_init,
+               .ras_late_init = amdgpu_ras_block_late_init,
                .ras_fini = mca_v3_0_mp0_ras_fini,
        },
 };
@@ -89,11 +84,6 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mp1_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
-       return amdgpu_mca_ras_late_init(adev, &adev->mca.mp1);
-}
-
 static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev)
 {
        amdgpu_mca_ras_fini(adev, &adev->mca.mp1);
@@ -114,7 +104,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
                },
                .hw_ops = &mca_v3_0_mp1_hw_ops,
                .ras_block_match = mca_v3_0_ras_block_match,
-               .ras_late_init = mca_v3_0_mp1_ras_late_init,
+               .ras_late_init = amdgpu_ras_block_late_init,
                .ras_fini = mca_v3_0_mp1_ras_fini,
        },
 };
@@ -127,11 +117,6 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mpio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
-       return amdgpu_mca_ras_late_init(adev, &adev->mca.mpio);
-}
-
 static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev)
 {
        amdgpu_mca_ras_fini(adev, &adev->mca.mpio);
@@ -152,7 +137,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
                },
                .hw_ops = &mca_v3_0_mpio_hw_ops,
                .ras_block_match = mca_v3_0_ras_block_match,
-               .ras_late_init = mca_v3_0_mpio_ras_late_init,
+               .ras_late_init = amdgpu_ras_block_late_init,
                .ras_fini = mca_v3_0_mpio_ras_fini,
        },
 };