usb: gadget: s3c: use platform resources

The resources are correctly initialized, so just use them
instead of relying on hardcoded data from platform headers.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Felipe Balbi <balbi@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-8-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/arch/arm/plat-samsung/include/plat/regs-udc.h b/arch/arm/plat-samsung/include/plat/regs-udc.h
deleted file mode 100644 (file)
index d8d2eea..0000000
--- a/arch/arm/plat-samsung/include/plat/regs-udc.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
- */
-
-#ifndef __ASM_ARCH_REGS_UDC_H
-#define __ASM_ARCH_REGS_UDC_H
-
-#define S3C2410_USBDREG(x) (x)
-
-#define S3C2410_UDC_FUNC_ADDR_REG      S3C2410_USBDREG(0x0140)
-#define S3C2410_UDC_PWR_REG            S3C2410_USBDREG(0x0144)
-#define S3C2410_UDC_EP_INT_REG         S3C2410_USBDREG(0x0148)
-
-#define S3C2410_UDC_USB_INT_REG                S3C2410_USBDREG(0x0158)
-#define S3C2410_UDC_EP_INT_EN_REG      S3C2410_USBDREG(0x015c)
-
-#define S3C2410_UDC_USB_INT_EN_REG     S3C2410_USBDREG(0x016c)
-
-#define S3C2410_UDC_FRAME_NUM1_REG     S3C2410_USBDREG(0x0170)
-#define S3C2410_UDC_FRAME_NUM2_REG     S3C2410_USBDREG(0x0174)
-
-#define S3C2410_UDC_EP0_FIFO_REG       S3C2410_USBDREG(0x01c0)
-#define S3C2410_UDC_EP1_FIFO_REG       S3C2410_USBDREG(0x01c4)
-#define S3C2410_UDC_EP2_FIFO_REG       S3C2410_USBDREG(0x01c8)
-#define S3C2410_UDC_EP3_FIFO_REG       S3C2410_USBDREG(0x01cc)
-#define S3C2410_UDC_EP4_FIFO_REG       S3C2410_USBDREG(0x01d0)
-
-#define S3C2410_UDC_EP1_DMA_CON                S3C2410_USBDREG(0x0200)
-#define S3C2410_UDC_EP1_DMA_UNIT       S3C2410_USBDREG(0x0204)
-#define S3C2410_UDC_EP1_DMA_FIFO       S3C2410_USBDREG(0x0208)
-#define S3C2410_UDC_EP1_DMA_TTC_L      S3C2410_USBDREG(0x020c)
-#define S3C2410_UDC_EP1_DMA_TTC_M      S3C2410_USBDREG(0x0210)
-#define S3C2410_UDC_EP1_DMA_TTC_H      S3C2410_USBDREG(0x0214)
-
-#define S3C2410_UDC_EP2_DMA_CON                S3C2410_USBDREG(0x0218)
-#define S3C2410_UDC_EP2_DMA_UNIT       S3C2410_USBDREG(0x021c)
-#define S3C2410_UDC_EP2_DMA_FIFO       S3C2410_USBDREG(0x0220)
-#define S3C2410_UDC_EP2_DMA_TTC_L      S3C2410_USBDREG(0x0224)
-#define S3C2410_UDC_EP2_DMA_TTC_M      S3C2410_USBDREG(0x0228)
-#define S3C2410_UDC_EP2_DMA_TTC_H      S3C2410_USBDREG(0x022c)
-
-#define S3C2410_UDC_EP3_DMA_CON                S3C2410_USBDREG(0x0240)
-#define S3C2410_UDC_EP3_DMA_UNIT       S3C2410_USBDREG(0x0244)
-#define S3C2410_UDC_EP3_DMA_FIFO       S3C2410_USBDREG(0x0248)
-#define S3C2410_UDC_EP3_DMA_TTC_L      S3C2410_USBDREG(0x024c)
-#define S3C2410_UDC_EP3_DMA_TTC_M      S3C2410_USBDREG(0x0250)
-#define S3C2410_UDC_EP3_DMA_TTC_H      S3C2410_USBDREG(0x0254)
-
-#define S3C2410_UDC_EP4_DMA_CON                S3C2410_USBDREG(0x0258)
-#define S3C2410_UDC_EP4_DMA_UNIT       S3C2410_USBDREG(0x025c)
-#define S3C2410_UDC_EP4_DMA_FIFO       S3C2410_USBDREG(0x0260)
-#define S3C2410_UDC_EP4_DMA_TTC_L      S3C2410_USBDREG(0x0264)
-#define S3C2410_UDC_EP4_DMA_TTC_M      S3C2410_USBDREG(0x0268)
-#define S3C2410_UDC_EP4_DMA_TTC_H      S3C2410_USBDREG(0x026c)
-
-#define S3C2410_UDC_INDEX_REG          S3C2410_USBDREG(0x0178)
-
-/* indexed registers */
-
-#define S3C2410_UDC_MAXP_REG           S3C2410_USBDREG(0x0180)
-
-#define S3C2410_UDC_EP0_CSR_REG                S3C2410_USBDREG(0x0184)
-
-#define S3C2410_UDC_IN_CSR1_REG                S3C2410_USBDREG(0x0184)
-#define S3C2410_UDC_IN_CSR2_REG                S3C2410_USBDREG(0x0188)
-
-#define S3C2410_UDC_OUT_CSR1_REG       S3C2410_USBDREG(0x0190)
-#define S3C2410_UDC_OUT_CSR2_REG       S3C2410_USBDREG(0x0194)
-#define S3C2410_UDC_OUT_FIFO_CNT1_REG  S3C2410_USBDREG(0x0198)
-#define S3C2410_UDC_OUT_FIFO_CNT2_REG  S3C2410_USBDREG(0x019c)
-
-#define S3C2410_UDC_FUNCADDR_UPDATE    (1 << 7)
-
-#define S3C2410_UDC_PWR_ISOUP          (1 << 7) /* R/W */
-#define S3C2410_UDC_PWR_RESET          (1 << 3) /* R   */
-#define S3C2410_UDC_PWR_RESUME         (1 << 2) /* R/W */
-#define S3C2410_UDC_PWR_SUSPEND                (1 << 1) /* R   */
-#define S3C2410_UDC_PWR_ENSUSPEND      (1 << 0) /* R/W */
-
-#define S3C2410_UDC_PWR_DEFAULT                (0x00)
-
-#define S3C2410_UDC_INT_EP4            (1 << 4) /* R/W (clear only) */
-#define S3C2410_UDC_INT_EP3            (1 << 3) /* R/W (clear only) */
-#define S3C2410_UDC_INT_EP2            (1 << 2) /* R/W (clear only) */
-#define S3C2410_UDC_INT_EP1            (1 << 1) /* R/W (clear only) */
-#define S3C2410_UDC_INT_EP0            (1 << 0) /* R/W (clear only) */
-
-#define S3C2410_UDC_USBINT_RESET       (1 << 2) /* R/W (clear only) */
-#define S3C2410_UDC_USBINT_RESUME      (1 << 1) /* R/W (clear only) */
-#define S3C2410_UDC_USBINT_SUSPEND     (1 << 0) /* R/W (clear only) */
-
-#define S3C2410_UDC_INTE_EP4           (1 << 4) /* R/W */
-#define S3C2410_UDC_INTE_EP3           (1 << 3) /* R/W */
-#define S3C2410_UDC_INTE_EP2           (1 << 2) /* R/W */
-#define S3C2410_UDC_INTE_EP1           (1 << 1) /* R/W */
-#define S3C2410_UDC_INTE_EP0           (1 << 0) /* R/W */
-
-#define S3C2410_UDC_USBINTE_RESET      (1 << 2) /* R/W */
-#define S3C2410_UDC_USBINTE_SUSPEND    (1 << 0) /* R/W */
-
-#define S3C2410_UDC_INDEX_EP0          (0x00)
-#define S3C2410_UDC_INDEX_EP1          (0x01)
-#define S3C2410_UDC_INDEX_EP2          (0x02)
-#define S3C2410_UDC_INDEX_EP3          (0x03)
-#define S3C2410_UDC_INDEX_EP4          (0x04)
-
-#define S3C2410_UDC_ICSR1_CLRDT                (1 << 6) /* R/W */
-#define S3C2410_UDC_ICSR1_SENTSTL      (1 << 5) /* R/W (clear only) */
-#define S3C2410_UDC_ICSR1_SENDSTL      (1 << 4) /* R/W */
-#define S3C2410_UDC_ICSR1_FFLUSH       (1 << 3) /* W   (set only) */
-#define S3C2410_UDC_ICSR1_UNDRUN       (1 << 2) /* R/W (clear only) */
-#define S3C2410_UDC_ICSR1_PKTRDY       (1 << 0) /* R/W (set only) */
-
-#define S3C2410_UDC_ICSR2_AUTOSET      (1 << 7) /* R/W */
-#define S3C2410_UDC_ICSR2_ISO          (1 << 6) /* R/W */
-#define S3C2410_UDC_ICSR2_MODEIN       (1 << 5) /* R/W */
-#define S3C2410_UDC_ICSR2_DMAIEN       (1 << 4) /* R/W */
-
-#define S3C2410_UDC_OCSR1_CLRDT                (1 << 7) /* R/W */
-#define S3C2410_UDC_OCSR1_SENTSTL      (1 << 6) /* R/W (clear only) */
-#define S3C2410_UDC_OCSR1_SENDSTL      (1 << 5) /* R/W */
-#define S3C2410_UDC_OCSR1_FFLUSH       (1 << 4) /* R/W */
-#define S3C2410_UDC_OCSR1_DERROR       (1 << 3) /* R   */
-#define S3C2410_UDC_OCSR1_OVRRUN       (1 << 2) /* R/W (clear only) */
-#define S3C2410_UDC_OCSR1_PKTRDY       (1 << 0) /* R/W (clear only) */
-
-#define S3C2410_UDC_OCSR2_AUTOCLR      (1 << 7) /* R/W */
-#define S3C2410_UDC_OCSR2_ISO          (1 << 6) /* R/W */
-#define S3C2410_UDC_OCSR2_DMAIEN       (1 << 5) /* R/W */
-
-#define S3C2410_UDC_EP0_CSR_OPKRDY     (1 << 0)
-#define S3C2410_UDC_EP0_CSR_IPKRDY     (1 << 1)
-#define S3C2410_UDC_EP0_CSR_SENTSTL    (1 << 2)
-#define S3C2410_UDC_EP0_CSR_DE         (1 << 3)
-#define S3C2410_UDC_EP0_CSR_SE         (1 << 4)
-#define S3C2410_UDC_EP0_CSR_SENDSTL    (1 << 5)
-#define S3C2410_UDC_EP0_CSR_SOPKTRDY   (1 << 6)
-#define S3C2410_UDC_EP0_CSR_SSE                (1 << 7)
-
-#define S3C2410_UDC_MAXP_8             (1 << 0)
-#define S3C2410_UDC_MAXP_16            (1 << 1)
-#define S3C2410_UDC_MAXP_32            (1 << 2)
-#define S3C2410_UDC_MAXP_64            (1 << 3)
-
-#endif

diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c
index bc2e8eb..bb8bae1 100644 (file)
--- a/drivers/usb/gadget/udc/s3c2410_udc.c
+++ b/drivers/usb/gadget/udc/s3c2410_udc.c
@@ -36,15 +36,11 @@
 #include <asm/byteorder.h>
 #include <asm/irq.h>
 #include <asm/unaligned.h>
-#include <mach/irqs.h>
 
-#include <mach/hardware.h>
-
-#include <plat/regs-udc.h>
 #include <linux/platform_data/usb-s3c2410_udc.h>
 
-
 #include "s3c2410_udc.h"
+#include "s3c2410_udc_regs.h"
 
 #define DRIVER_DESC    "S3C2410 USB Device Controller Gadget"
 #define DRIVER_AUTHOR  "Herbert Pötzl <herbert@13thfloor.at>, " \
@@ -57,6 +53,7 @@ static struct s3c2410_udc     *the_controller;
 static struct clk              *udc_clock;
 static struct clk              *usb_bus_clock;
 static void __iomem            *base_addr;
+static int                     irq_usbd;
 static u64                     rsrc_start;
 static u64                     rsrc_len;
 static struct dentry           *s3c2410_udc_debugfs_root;
@@ -835,8 +832,6 @@ static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
        }
 }
 
-#include <mach/regs-irq.h>
-
 /*
  *     s3c2410_udc_irq - interrupt handler
  */
@@ -977,7 +972,7 @@ static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
                }
        }
 
-       dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
+       dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd);
 
        /* Restore old index */
        udc_write(idx, S3C2410_UDC_INDEX_REG);
@@ -1780,13 +1775,7 @@ static int s3c2410_udc_probe(struct platform_device *pdev)
        spin_lock_init(&udc->lock);
        udc_info = dev_get_platdata(&pdev->dev);
 
-       rsrc_start = S3C2410_PA_USBDEV;
-       rsrc_len   = S3C24XX_SZ_USBDEV;
-
-       if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
-               return -EBUSY;
-
-       base_addr = ioremap(rsrc_start, rsrc_len);
+       base_addr = devm_platform_ioremap_resource(pdev, 0);
        if (!base_addr) {
                retval = -ENOMEM;
                goto err_mem;
@@ -1798,17 +1787,19 @@ static int s3c2410_udc_probe(struct platform_device *pdev)
        s3c2410_udc_disable(udc);
        s3c2410_udc_reinit(udc);
 
+       irq_usbd = platform_get_irq(pdev, 0);
+
        /* irq setup after old hardware state is cleaned up */
-       retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
+       retval = request_irq(irq_usbd, s3c2410_udc_irq,
                             0, gadget_name, udc);
 
        if (retval != 0) {
-               dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
+               dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval);
                retval = -EBUSY;
                goto err_map;
        }
 
-       dev_dbg(dev, "got irq %i\n", IRQ_USBD);
+       dev_dbg(dev, "got irq %i\n", irq_usbd);
 
        if (udc_info && udc_info->vbus_pin > 0) {
                retval = gpio_request(udc_info->vbus_pin, "udc vbus");
@@ -1875,7 +1866,7 @@ err_gpio_claim:
        if (udc_info && udc_info->vbus_pin > 0)
                gpio_free(udc_info->vbus_pin);
 err_int:
-       free_irq(IRQ_USBD, udc);
+       free_irq(irq_usbd, udc);
 err_map:
        iounmap(base_addr);
 err_mem:
@@ -1909,7 +1900,7 @@ static int s3c2410_udc_remove(struct platform_device *pdev)
                free_irq(irq, udc);
        }
 
-       free_irq(IRQ_USBD, udc);
+       free_irq(irq_usbd, udc);
 
        iounmap(base_addr);
        release_mem_region(rsrc_start, rsrc_len);

diff --git a/drivers/usb/gadget/udc/s3c2410_udc.h b/drivers/usb/gadget/udc/s3c2410_udc.h
index bdcaa8d..68bdf3e 100644 (file)
--- a/drivers/usb/gadget/udc/s3c2410_udc.h
+++ b/drivers/usb/gadget/udc/s3c2410_udc.h
@@ -90,6 +90,7 @@ struct s3c2410_udc {
        unsigned                        req_pending : 1;
        u8                              vbus;
        struct dentry                   *regs_info;
+       int                             irq;
 };
 #define to_s3c2410(g)  (container_of((g), struct s3c2410_udc, gadget))
 

diff --git a/drivers/usb/gadget/udc/s3c2410_udc_regs.h b/drivers/usb/gadget/udc/s3c2410_udc_regs.h
new file mode 100644 (file)
index 0000000..d8d2eea
--- /dev/null
+++ b/drivers/usb/gadget/udc/s3c2410_udc_regs.h
@@ -0,0 +1,146 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
+ */
+
+#ifndef __ASM_ARCH_REGS_UDC_H
+#define __ASM_ARCH_REGS_UDC_H
+
+#define S3C2410_USBDREG(x) (x)
+
+#define S3C2410_UDC_FUNC_ADDR_REG      S3C2410_USBDREG(0x0140)
+#define S3C2410_UDC_PWR_REG            S3C2410_USBDREG(0x0144)
+#define S3C2410_UDC_EP_INT_REG         S3C2410_USBDREG(0x0148)
+
+#define S3C2410_UDC_USB_INT_REG                S3C2410_USBDREG(0x0158)
+#define S3C2410_UDC_EP_INT_EN_REG      S3C2410_USBDREG(0x015c)
+
+#define S3C2410_UDC_USB_INT_EN_REG     S3C2410_USBDREG(0x016c)
+
+#define S3C2410_UDC_FRAME_NUM1_REG     S3C2410_USBDREG(0x0170)
+#define S3C2410_UDC_FRAME_NUM2_REG     S3C2410_USBDREG(0x0174)
+
+#define S3C2410_UDC_EP0_FIFO_REG       S3C2410_USBDREG(0x01c0)
+#define S3C2410_UDC_EP1_FIFO_REG       S3C2410_USBDREG(0x01c4)
+#define S3C2410_UDC_EP2_FIFO_REG       S3C2410_USBDREG(0x01c8)
+#define S3C2410_UDC_EP3_FIFO_REG       S3C2410_USBDREG(0x01cc)
+#define S3C2410_UDC_EP4_FIFO_REG       S3C2410_USBDREG(0x01d0)
+
+#define S3C2410_UDC_EP1_DMA_CON                S3C2410_USBDREG(0x0200)
+#define S3C2410_UDC_EP1_DMA_UNIT       S3C2410_USBDREG(0x0204)
+#define S3C2410_UDC_EP1_DMA_FIFO       S3C2410_USBDREG(0x0208)
+#define S3C2410_UDC_EP1_DMA_TTC_L      S3C2410_USBDREG(0x020c)
+#define S3C2410_UDC_EP1_DMA_TTC_M      S3C2410_USBDREG(0x0210)
+#define S3C2410_UDC_EP1_DMA_TTC_H      S3C2410_USBDREG(0x0214)
+
+#define S3C2410_UDC_EP2_DMA_CON                S3C2410_USBDREG(0x0218)
+#define S3C2410_UDC_EP2_DMA_UNIT       S3C2410_USBDREG(0x021c)
+#define S3C2410_UDC_EP2_DMA_FIFO       S3C2410_USBDREG(0x0220)
+#define S3C2410_UDC_EP2_DMA_TTC_L      S3C2410_USBDREG(0x0224)
+#define S3C2410_UDC_EP2_DMA_TTC_M      S3C2410_USBDREG(0x0228)
+#define S3C2410_UDC_EP2_DMA_TTC_H      S3C2410_USBDREG(0x022c)
+
+#define S3C2410_UDC_EP3_DMA_CON                S3C2410_USBDREG(0x0240)
+#define S3C2410_UDC_EP3_DMA_UNIT       S3C2410_USBDREG(0x0244)
+#define S3C2410_UDC_EP3_DMA_FIFO       S3C2410_USBDREG(0x0248)
+#define S3C2410_UDC_EP3_DMA_TTC_L      S3C2410_USBDREG(0x024c)
+#define S3C2410_UDC_EP3_DMA_TTC_M      S3C2410_USBDREG(0x0250)
+#define S3C2410_UDC_EP3_DMA_TTC_H      S3C2410_USBDREG(0x0254)
+
+#define S3C2410_UDC_EP4_DMA_CON                S3C2410_USBDREG(0x0258)
+#define S3C2410_UDC_EP4_DMA_UNIT       S3C2410_USBDREG(0x025c)
+#define S3C2410_UDC_EP4_DMA_FIFO       S3C2410_USBDREG(0x0260)
+#define S3C2410_UDC_EP4_DMA_TTC_L      S3C2410_USBDREG(0x0264)
+#define S3C2410_UDC_EP4_DMA_TTC_M      S3C2410_USBDREG(0x0268)
+#define S3C2410_UDC_EP4_DMA_TTC_H      S3C2410_USBDREG(0x026c)
+
+#define S3C2410_UDC_INDEX_REG          S3C2410_USBDREG(0x0178)
+
+/* indexed registers */
+
+#define S3C2410_UDC_MAXP_REG           S3C2410_USBDREG(0x0180)
+
+#define S3C2410_UDC_EP0_CSR_REG                S3C2410_USBDREG(0x0184)
+
+#define S3C2410_UDC_IN_CSR1_REG                S3C2410_USBDREG(0x0184)
+#define S3C2410_UDC_IN_CSR2_REG                S3C2410_USBDREG(0x0188)
+
+#define S3C2410_UDC_OUT_CSR1_REG       S3C2410_USBDREG(0x0190)
+#define S3C2410_UDC_OUT_CSR2_REG       S3C2410_USBDREG(0x0194)
+#define S3C2410_UDC_OUT_FIFO_CNT1_REG  S3C2410_USBDREG(0x0198)
+#define S3C2410_UDC_OUT_FIFO_CNT2_REG  S3C2410_USBDREG(0x019c)
+
+#define S3C2410_UDC_FUNCADDR_UPDATE    (1 << 7)
+
+#define S3C2410_UDC_PWR_ISOUP          (1 << 7) /* R/W */
+#define S3C2410_UDC_PWR_RESET          (1 << 3) /* R   */
+#define S3C2410_UDC_PWR_RESUME         (1 << 2) /* R/W */
+#define S3C2410_UDC_PWR_SUSPEND                (1 << 1) /* R   */
+#define S3C2410_UDC_PWR_ENSUSPEND      (1 << 0) /* R/W */
+
+#define S3C2410_UDC_PWR_DEFAULT                (0x00)
+
+#define S3C2410_UDC_INT_EP4            (1 << 4) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP3            (1 << 3) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP2            (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP1            (1 << 1) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP0            (1 << 0) /* R/W (clear only) */
+
+#define S3C2410_UDC_USBINT_RESET       (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_USBINT_RESUME      (1 << 1) /* R/W (clear only) */
+#define S3C2410_UDC_USBINT_SUSPEND     (1 << 0) /* R/W (clear only) */
+
+#define S3C2410_UDC_INTE_EP4           (1 << 4) /* R/W */
+#define S3C2410_UDC_INTE_EP3           (1 << 3) /* R/W */
+#define S3C2410_UDC_INTE_EP2           (1 << 2) /* R/W */
+#define S3C2410_UDC_INTE_EP1           (1 << 1) /* R/W */
+#define S3C2410_UDC_INTE_EP0           (1 << 0) /* R/W */
+
+#define S3C2410_UDC_USBINTE_RESET      (1 << 2) /* R/W */
+#define S3C2410_UDC_USBINTE_SUSPEND    (1 << 0) /* R/W */
+
+#define S3C2410_UDC_INDEX_EP0          (0x00)
+#define S3C2410_UDC_INDEX_EP1          (0x01)
+#define S3C2410_UDC_INDEX_EP2          (0x02)
+#define S3C2410_UDC_INDEX_EP3          (0x03)
+#define S3C2410_UDC_INDEX_EP4          (0x04)
+
+#define S3C2410_UDC_ICSR1_CLRDT                (1 << 6) /* R/W */
+#define S3C2410_UDC_ICSR1_SENTSTL      (1 << 5) /* R/W (clear only) */
+#define S3C2410_UDC_ICSR1_SENDSTL      (1 << 4) /* R/W */
+#define S3C2410_UDC_ICSR1_FFLUSH       (1 << 3) /* W   (set only) */
+#define S3C2410_UDC_ICSR1_UNDRUN       (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_ICSR1_PKTRDY       (1 << 0) /* R/W (set only) */
+
+#define S3C2410_UDC_ICSR2_AUTOSET      (1 << 7) /* R/W */
+#define S3C2410_UDC_ICSR2_ISO          (1 << 6) /* R/W */
+#define S3C2410_UDC_ICSR2_MODEIN       (1 << 5) /* R/W */
+#define S3C2410_UDC_ICSR2_DMAIEN       (1 << 4) /* R/W */
+
+#define S3C2410_UDC_OCSR1_CLRDT                (1 << 7) /* R/W */
+#define S3C2410_UDC_OCSR1_SENTSTL      (1 << 6) /* R/W (clear only) */
+#define S3C2410_UDC_OCSR1_SENDSTL      (1 << 5) /* R/W */
+#define S3C2410_UDC_OCSR1_FFLUSH       (1 << 4) /* R/W */
+#define S3C2410_UDC_OCSR1_DERROR       (1 << 3) /* R   */
+#define S3C2410_UDC_OCSR1_OVRRUN       (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_OCSR1_PKTRDY       (1 << 0) /* R/W (clear only) */
+
+#define S3C2410_UDC_OCSR2_AUTOCLR      (1 << 7) /* R/W */
+#define S3C2410_UDC_OCSR2_ISO          (1 << 6) /* R/W */
+#define S3C2410_UDC_OCSR2_DMAIEN       (1 << 5) /* R/W */
+
+#define S3C2410_UDC_EP0_CSR_OPKRDY     (1 << 0)
+#define S3C2410_UDC_EP0_CSR_IPKRDY     (1 << 1)
+#define S3C2410_UDC_EP0_CSR_SENTSTL    (1 << 2)
+#define S3C2410_UDC_EP0_CSR_DE         (1 << 3)
+#define S3C2410_UDC_EP0_CSR_SE         (1 << 4)
+#define S3C2410_UDC_EP0_CSR_SENDSTL    (1 << 5)
+#define S3C2410_UDC_EP0_CSR_SOPKTRDY   (1 << 6)
+#define S3C2410_UDC_EP0_CSR_SSE                (1 << 7)
+
+#define S3C2410_UDC_MAXP_8             (1 << 0)
+#define S3C2410_UDC_MAXP_16            (1 << 1)
+#define S3C2410_UDC_MAXP_32            (1 << 2)
+#define S3C2410_UDC_MAXP_64            (1 << 3)
+
+#endif