drm/i915/icl: Drop a couple unnecessary workarounds

While doing a quick sanity check of the ICL workarounds in the driver I
noticed a few things that should be updated:

 * There's no mention in the bspec that WaPipelineFlushCoherentLines
   is needed on gen11 (both the current WA database and the old,
   deprecated page 20196 were checked); it appears this might have just
   been copied from the gen9 list?  Even if this were needed, it doesn't
   seem like this was the correct implementation anyway since the gen9
   workaround is supposed to be implemented in the indirect context bb
   (as we do in gen8_emit_flush_coherentl3_wa() on gen8/gen9).

 * WaForwardProgressSoftReset does not appear in the current workaround
   database.  The old deprecated workaround list has a note indicating
   the workaround was dropped in 2017, so we should be safe to drop it
   from the code too.

While we're at it, add the formal workaround ID number to
WaDisableBankHangMode (our hardware team made a transition from
text-based workaround names to ID numbers partway through the
development of ICL, which is why some workarounds only have names, some
only have numbers, and some have both).

Bspec: 33450
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210717051426.4120328-3-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 76a3b5d..36d9724 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -517,7 +517,7 @@ static void cfl_ctx_workarounds_init(struct intel_engine_cs *engine,
 static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
                                     struct i915_wa_list *wal)
 {
-       /* WaDisableBankHangMode:icl */
+       /* Wa_1406697149 (WaDisableBankHangMode:icl) */
        wa_write(wal,
                 GEN8_L3CNTLREG,
                 intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
@@ -1587,11 +1587,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                             _3D_CHICKEN3,
                             _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE);
 
-               /* WaPipelineFlushCoherentLines:icl */
-               wa_write_or(wal,
-                           GEN8_L3SQCREG4,
-                           GEN8_LQSC_FLUSH_COHERENT_LINES);
-
                /*
                 * Wa_1405543622:icl
                 * Formerly known as WaGAPZPriorityScheme
@@ -1621,13 +1616,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                            GEN8_L3SQCREG4,
                            GEN11_LQSC_CLEAN_EVICT_DISABLE);
 
-               /* WaForwardProgressSoftReset:icl */
-               wa_write_or(wal,
-                           GEN10_SCRATCH_LNCF2,
-                           PMFLUSHDONE_LNICRSDROP |
-                           PMFLUSH_GAPL3UNBLOCK |
-                           PMFLUSHDONE_LNEBLK);
-
                /* Wa_1606682166:icl */
                wa_write_or(wal,
                            GEN7_SARCHKMD,